In an article titled EDA tools for FPGA running out of gas Mark LaPedus reports comments made by Simon Bloch, vice president and general manager of the Design and Synthesis Division for Mentor Graphics. Mr. Bloch's remarks, as reported, were ambiguous since he did not specify what class of tools he was talking about, or even whether his remarks applied to all designs or just the leading edge ones. Thus the statement that "EDA tools for FPGA designs are running out of gas" is either true or not true depending on your point of view.
FPGA vendors supplied tools
Ever since there has been an FPGA industry, vendors have offered their own internally developed EDA tools. The justification has always been the same. "We cannot depend on third party support for our silicon". Of course, as history has shown, EDA vendors have always provided FPGA development tools supporting FPGA vendors, and certainly all leading ones.
Development and support of EDA tools by semiconductor vendors are overhead expenses and fall into the sales support category. The goal of these tools is not to serve leading edge customers, but to provide a safety net for all customers. As such they are made available at a price that varies from free to full list price, depending on "circumstances" surrounding the sale of silicon devices.
The quality of the tools is comparable to those offered by EDA vendors, they are not second class tools when it comes to their reliability. But they are designed and developed to support mainstream designers, a class of customers that is extremely important to FPGA vendors.
The tools have been considered unfair competition by some EDA vendors in the past, but market realities have changed and EDA companies are finding that FPGA development tools are becoming a lucrative and a growing segment of the market.
A shifting market
The regularity of the FPGA structure makes them ideally suited to be the first type of device implemented in a new fabrication node. This fact also assures that yields of this type of devices is higher than custom IC devices. This, coupled with the ever increasing cost of development and manufacture of custom ICs, has convinced many system houses to use FPGA devices not just for prototype or early availability runs, but for the entire life of the product. When taking into consideration the high number of devices needed to be sold in order to realize an acceptable return on investment on a custom IC development, the differential between the higher unit cost of an FPGA device versus an IC becomes irrelevant if the projected number of units to be sold is less than what would be required to achieve profitability with a custom IC.
The result is that not only the number of designs that are implemented in FPGAs is increasing, but the complexity of those designs is also increasing, requiring more powerful EDA tools. Until recently, Mentor was the only major EDA vendor that offered tools specifically designed to support FPGA development. In addition to the ModelSim simulator, it offers the Precision and Leonardo synthesis tools. These products supported traditional HDL based design methods. It also sells the Catapult - C product that allows designers to express algorithms in C thus elevating the level of abstraction used to design circuitry.
In the first half of 2007 Synopsys purchased Synplicity, a company that had focused most of its products to aid engineers implement their designs using FPGA devices. At this point Synopsys must be considered a viable competitor in this market segment, given the robustness of the tools it acquired from Synplicity. Although the Synopsys tools support traditional HDL based design methods, when combined with products from, for example, The Mathworks that transform algorithmic representations of designs into HDL representation, the combined methodology does offer a viable road from system level design to implementation.
As with most other designs, the software content in a design is increasing and its integration and debug is becoming a more important issue for engineers. Both Mentor and Synopsys offer development boards, just as does EVE and other smaller vendors. Mr. Bloch also pointed to the need for improved IP blocks availability. In fact the number of IP vendors targeting the FPGA market is larger than those serving all other aspects of semiconductor design. The problem is not one of availability, but rather one of quality and thus trust. Both mentor and Synopsys sell IP products that can be used in FPGA designs, as does ARM, Tensilica, Altera and Xilinx for that matter. These vendors alone should be sufficient to satisfy the demand for qualified IP components from designers, and there are other smaller independent providers of IP products, CAST comes to mind immediately, who are trusted providers in this segment. Thus I am a bit confused by Mr. Bloch statement that significant improvements in this area are required.
What is needed
If companies are going to fully consider FPGAs as a credible replacement for custom ICs in all applications, we need tools that allow designers to plan, evaluate, and implement low power designs using FPGAs. At this moment we lack tools for low power designs that are specifically adapted for the architecture of FPGA devices. This is true both for power estimation during design as well as power consumption analysis during implementation.
But what is even more important is a change in the perception by many EDA vendors, that the FPGA market segment is a low margin area that is not worth entering. Although this was true in the last century, when FPGA and PLD devices were used either for discrete logic replacement or for low end applications, this is clearly not the case anymore. If any establish company or startup needs a clear signal that the margins are now becoming competitive with those of the rest of the EDA market, just look at Synopsys decision to enter the market in a serious way, after having tinkered with it a couple of times in the past. Synopsys is not a company that goes after low margin segments, yet it invested in acquiring Synplicity and has taken great pains in keeping that organization focused to pursue a leadership position in the FPGA market.
EDA tools for FPGA are not running out of steam, but could certainly benefit from additional energy in under-served areas, and, as with the rest of the EDA industry, will always benefit from incremental improvements to existing tools.