I just heard that the folks at Xilinx have started shipping the first member of their Virtex-7 family of 28 nm FPGAs – the VX485T – to advanced customers.
Just to remind ourselves, there are three families of 7 Series FPGAs: The Artix-7 family will offer the lowest cost and power (these will be available early 2012), the Kintex-7 family address the middle part of the price/performance curve (members of this family started shipping in March 2011), and the Virtex-7 family offer the highest capacity and system performance.
Relative to the previous generation of devices, the new Virtex-7 FPGAs offer 2X the serial I/O bandwidth, 2X the processing capability, and 2X the capacity.
Actually, the raw specifications are enough to make your eyes water. In the case of serial I/O bandwidth, for example, we’re talking about up to 96 serial channels, some of which will provide up to 12.5 Gbps, others up to 13.1 Gbps, and still others up to 28 Gbps giving a maximum I/O bandwidth of 2.7 terabits per second.
Similarly, in the case of raw processing power, we’re looking at up to 3,960 systolic DSP slices running at up to 700 MHz providing a single chip DSP bandwidth of 5.1 teraMACs (eeek!). And with regard to capacity, the largest device (implemented using four FPGA die mounted on a silicon interposer using through-silicon vias) will provide 2 million logic cells (the mind boggles).
As I said, the first member of the Virtex-7 ensemble to be made available to advanced customers is the VX485T, which occupies the “sweet spot” in the middle of the family. As one example of the type of application in which this component will shine, consider a wired communication 2 x 100G line card:
Is it just me, or do you agree that this sort of thing is pretty amazing. I remember when the first FPGAs came out containing just a couple of handfuls of logic cells (metaphorically speaking). I had no idea that they would evolve into the monsters of today. Also, check out the following video on YouTube – about 2 minutes and 12 seconds in you can see a live demo of the VX485T, which looks rather tasty:
I’m sure we will be hearing more about these little scamps in the not-so-distant future … watch this space!
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David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.