Traditionally, printed circuit board (PCB) design engineers – and, more recently, designers of System-in-Package (SiP) assemblies – have captured their hardware designs using pages in a flat schematic. In the case of a team of design engineers, each engineer works on a range of pages and then integrates these pages by copying them into a file system or importing them into the master schematic (the actual route taken depends on the storage format of the particular schematic tools).
This approach is simple and easy for engineers to understand and use, but it does have some overheads and challenges associated with it as follows:
- Since interconnection across pages is achieved through net names, typing mistakes in the net names can result in multiple nets when one was intended; even worse, the shorting of two nets that were supposed to be independent may occur.
- Constraints can be captured only after integration.
- There is no easy way to replicate a circuit or a portion thereof. In the case of a memory design, for example, engineers have to manually copy and paste the circuit multiple times and then rename the signals, all of which is time-consuming and error-prone. Furthermore, after the initial copy-paste-rename process, if any changes occur in the master circuit, the engineers will have to replicate these changes in each of the copies by hand.
- There may also be problems with regard to handling requests for changes in page ranges. For example, consider the case where multiple engineers are working on the schematic and each engineer is assigned a range of pages. If any of the engineers requires one or more additional pages, this will impact the design team as a whole.
A flat design approach
The alternative is to use a hierarchical design methodology, in which the design is partitioned into standalone functional blocks. These blocks are then instantiated as schematic symbols and interconnected in the design.
A hierarchical design approach
The advantages of this hierarchical approach are as follows:
- Fewer net name conflict issues as the connectivity is derived through ports on a block.
- Constraints can be captured while the logic is being defined
- It is easy to replicate a block and easy to make changes at the block level.
- Functional blocks are easier to reuse across multiple designs than they are when captured in the form of flat schematic pages.
- Engineers can create design variants at the block level.
- Each functional block can have a physical implementation associated with it; that is, a re-use module.
The hierarchical form of design has significant advantages that many companies use to their advantage. These companies have figured out how to address any issues that may arise when using hierarchical design methodology. Having said this, there are still quite a large number of companies that continue to employ a flat design methodology.
Have you considered using Hierarchy? If not, what are the main reasons why you don’t use hierarchy?
- Net names have hierarchical block names associated with them
- Cross referencing across pages is difficult
- Lack of support within the company
- Tools are harder to use with hierarchical versus flat design methodologies
I would be very interested in hearing back from anyone that is currently using hierarchy and what you like and what you don’t like about a hierarchical methodology. I am also very interested in hearing from anyone that currently uses a flat design methodology as to what you think is required for you to leverage the benefits of a hierarchical design approach.
My name is Vikas Kohli. I am a Senior Architect in the Silicon Package Board division of Cadence Design Systems with more than 18 years of experience with focus areas in system design authoring, team design, and co-design techniques targeted for PCB and SiP. You can contact me at firstname.lastname@example.org