With regard to my recent blog about the demise of GateRocket: Goodbye GateRocket, we hardly knew ye… I just received an email from a reader with the subject My thoughts on why GateRocket shut down:
As someone who lived near GateRocket and followed their trip, I could see their demise back in 2008 and so was not surprised at what happened.
First of all, being it is a single FPGA board, it is basically an FPGA prototype development board. The market for FPGA development boards is very crowded, very competitive and very cost sensitive.
So they entered a very crowded market. The price range for FPGA prototype development boards range from a high of $20,000 (which included the top of the line FPGA's such as Virtex 6 and Stratix 4; plus they throw in the IDE/IDK and modelsim) to a low of free (where they give away the FPGA development boards).
Guess what GateRocket wanted for their boards?
$64,000!!!! Are they kidding!? Maybe if it was for ASIC development departments, but ASIC houses work at the 100 million logic gate sizes, not the 100 thousand FPGA gate size.
Next, they say their product is wonderful because it plugs into Modelsim!
Guess what, Xilinx has Chipscope and Atlera has Signaltap, free and included with their respective ISE's. And they work pretty good and get the job done just about as well as Modelsim when it comes to interfacing. So why bother with Modelsim for debug?
Finally when it comes to simulation speed, yes, running sims on 100 million logic gate ASIC's takes a lot of resources.
For FPGA's, with 10k to 100k logic sizes, today's logic simulators do just fine, or at least the runs times are measured in minutes and not hours, if it is an intense simulation. Again, no real need for GateRocket.
The way I look at, I just could see not any justification to spend $64,000 just to get a little better debug ability or increase in simulation speed, especially with FPGA projects that are very cost sensitive to begin with.
I tend to disagree about "runs times are measured in minutes and not hours" statement. Simulating many design types running even on a mid-size FPGA with low-cost ModelSim PE/DE can take hours. Upgrading to ModelSim SE or VCS can improve the performance ~2-10 times. Another option is co-simulation on an off-the-shelf dev board, which can speed up simulation 10+ times. Still cheaper than $64K product, though.
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.