As we get older, we are probably all willing to shell out a lot of money to make our memories more reliable and faster, but Lightspeed Venture Partners has just put their money where their mind is, to the tune of $5.1M. Memoir Systems has announced themselves to the world with a memory block that they believe could go a long way to solving the memory bottleneck found in many chips these days. They call their technique Algorithmic Memory(TM) technology and they claim that it provides an order of magnitude speedup in embedded memory performance while lowering area and power consumption.
Da Chuang, co-founder and COO says it uses algorithms synthesized in hardware to increase the performance of existing embedded memory macros -- up to 10X more MOPS. This technology is implemented as RTL-level IP, and is process, node, and foundry independent. Memoir's solutions appear as standard embedded memories, and can be readily integrated into existing standard SoC design flow."
Interestingly they also claim that their technology could work within FPGAs, but I think they are implying in the design of the FPGA itself rather than a synthesized version implemented in an existing FPGA fabric.
Sundar Iyer, co-founder and CTO, noted, "Algorithmic Memory technology is unique in the industry. Our approach introduces a new 'chisel' to solve the memory-performance bottleneck at a higher level of abstraction. This is different from the traditional 'hammer' of only relying on performance improvements in memory circuits. Our approach complements circuit techniques, and forms a powerful way to alleviate the traditional 'processor-memory' gap."
Memoir Systems Technology Overview
Memoir Systems' patent-pending Algorithmic Memory technology provides benefits in five different ways:
Increases Performance up to 10X: Memoir's Algorithmic Memory Technology increases the performance of existing embedded memory macros by implementing a variety of techniques such as caching, virtualization, pipelining, and data encoding, and weaves them together to operate seamlessly.
Shortens Development Time by 100X: Memory development can typically range between 6 to 12 months. Memoir's technology significantly shortens development time to days.
Quickens Memory Architecture Analysis by 1000X: Analysis of a custom memory can typically take up to 1 week. Memoir's technology allows memories to be architected and analyzed real-time within 10 seconds.
Lowers Area and Power: Memoir can take a lower performance memory (which typically has lower area and power), and synthesize a new memory which achieves higher memory performance. This Algorithmic Memory achieves the same performance as a high performance memory built using circuits alone, but has lower area and power.
Provides Versatility: Memoir's technology delivers configuration versatility because it is capable of synthesizing custom memories built on many different embedded memory types with any combination of read/write ports, and on any process, node or foundry.
More information can be found at www.memoir-systems.com
Brian Bailey keeping you covered
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