Atrenta and Cadence team to provide a back-end rule set aimed at increasing the confidence in the quality of results produced from high-level synthesis.
Some press releases cross my desk and everything is as clear as day, and others completely stump me. The latter was the case for one I saw this morning from Atrenta, who are partnering with Cadence to create a rule set for the Cadence C-to-Silicon high-level synthesis product. I was so confused that I put a call into Atrenta and managed to speak with Mike Gianfagna – VP of Marketing.
So let’s put this into perspective first. The Cadence C-to-Silicon product basically takes as input a block defined in SystemC (it’s a little more complicated than that, but a full description can wait for another time). The user provides directives to the tool and it produces optimized RTL. One of the original selling points of C-to-Silicon was that it was also tightly coupled with their RTL synthesis product such that they could get much more accurate timing information and ensure that downstream issues were not going to cause problems.
Then I read the press release. It says: “The initial focus for the alliance will be to verify that output of the Cadence® C-to-Silicon Compiler passes a set of high-level synthesis SpyGlass® rules”. So I asked, are they high-level synthesis rules or RTL rules? It turns out that they are RTL rules. Atrenta used to have a product that would look at the correctness of a SystemC description, but that is not a prioritized piece of work for them at the moment. Mike said that they do see high-level synthesis talking off and thus they may reconsider the importance of the high-level product in the future.
It would also appear that Cadence is defocussing on their back-end. The purpose of this collaboration is twofold. Firstly to check the output of the Cadence synthesis tool to see if it has produced results that are appropriate for certain types of design optimization. For example, is the output suitable for low power? Running the rules can save you having to run the back end tools only to find out that there are problems. The second purpose is to provide an independent validation of the quality of results, or put another way – can the customer trust C-to-Silicon to produce good results. I was surprised that one class of rules they itemized was for syntactic correctness. I was glad to hear that they have not yet uncovered any errors of this type in their early work.
I wondered if this partnership had been precipitated by the Calypto, Catapult merger. Mike assured me that these talks started before that event so this was not reactionary. However, the work is in its early stages and they don’t expect to have this ready for priority customers before early 2012. They also hope that Cadence will be running these tests within their design flow and with the entirety of their regression suite. This should then help them to optimize the information that is provided as an output to the end-customer.
Brian Bailey – keeping you covered
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