Checkpoint, Cadence, IP-Maker, Tensilica, Mentor Graphics and John Sanguinetti made the lineup today. See here for their news...
This is a roundup of news or activities in the past few days that may be of interest to people.
Checkpoint Technologies has announces the release of its new 3.0 Numerical Aperture (NA) Solid Immersion Lens Objective (SIL) designed to meet failure analysis industry customers needs for optically debugging integrated circuits at 22nm and below. The 3.0 NA SIL is available on any of Checkpoint Technologies InfraScan laser scanning systems. The InfraScan™ 300 ES, InfraScan™ 300 TDE and the InfraScan™ LTM provide imaging for laser scanning, photon emission, laser timing applications and optically debugging integrated circuits.
Cadence has announced that it has expanded its Flash IP offering to include support for the Open NAND Flash Interface (ONFI) 3.0 specification. Cadence claims to be the first company to provide a combined ONFI 3 controller and PHY IP solution, significantly streamlining SoC and system design while ensuring an optimized ONFI 3 implementation for maximum performance. Cadence Flash IP, including the broad portfolio of Denali IP acquired in 2010, has now been implemented by over 40 customers worldwide.
IP-Maker announces the availability of an IP core compliant to the NVM Express specification. This is an important step for the Solid-State Drive (SSD) market where the actual technology suffers from a throughput bottleneck. The NVMe IP core is the only architecture able to sustain growing performance demand for PCIe SSD applications, enabled by non-volatile memory technology. The IP-Maker NVMe IP core is a data transfer manager, to be integrated in SSD controllers between the PCI Express IP and the NandFlash controller.
Tensilica has announced the HiFi 3 audio/voice DSP (digital signal processor) IP core for SOC (system-on-chip) design. This fourth-generation audio DSP offers higher performance with lower power for high-performance audio post-processing and voice processing algorithms used in smartphone and home entertainment systems and expands Tensilica's HiFi architecture to quad 24/32-bits. Tensilica has already licensed HiFi 3 to a tier one smartphone OEM and a tier one semiconductor manufacturer.
Mentor Graphics has announced that it has acquired the Flowmaster Group, a supplier of 1D Computational Fluid Dynamics (CFD) simulation software for system design. 1D CFD solutions allow for rapid engineering design of complex fluid flow network systems like water-cooled electronic racks, automotive vehicle thermal management, and aerospace fuel systems. This acquisition is an example of an EDA company moving into an adjoining space namely the Computer-Aided Engineering (CAE) mechanical analysis space.
Dr. John W. Sanguinetti, chief technology officer at Forte Design Systems™, has been named a 2011 Association of Computing Machinery (ACM) Fellow for contributions to hardware simulation. Dr. Sanguinetti has been active in computer architecture, performance analysis, and design verification for 20 years; he is being recognized by ACM for helping to drive innovations that will sustain competitiveness in the digital age. More specifically he founded Chronologic Simulation in 1991 and was president until 1995. Dr. Sanguinetti was the principal architect of the Verilog Compiled Simulator (VCS), and was a major contributor to the resurgence in the use of the Verilog hardware design language (HDL) in the design community. He served on the Open Verilog International Board of Directors from 1992 to 1995 and was a major contributor to the working group which drafted the specification for the IEEE 1364 Verilog standard.
Brian Bailey – keeping you covered
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