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ESL is alive and well – Synopsys explains

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dyson_
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re: ESL is alive and well – Synopsys explains
dyson_   3/30/2012 11:17:28 AM
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Interesting to read about the blurring of the tool/IP boundary. We see this happening in a big way in our offering (ART). Complex IP has to include tools that allow the user to configure that IP and generate/have models to use in system verification. When the IP is dynamically reconfigurable this becomes even more important.

BrianBailey
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re: ESL is alive and well – Synopsys explains
BrianBailey   3/29/2012 4:59:57 PM
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While the term ESL may indeed not be an ideal acronym, it is an important step in raising the abstraction level of design and verification - which will enable ever more complex chips to be created.

defendor
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re: ESL is alive and well – Synopsys explains
defendor   3/29/2012 12:21:39 PM
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ESL...I'm sure this tool was created by the same group of idiots that insist on naming every half-baked EDA methodology with 3 letter acronyms.

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