This weekly posting provides a condensation of some of the best EDA and IP blogs from the web over the past week. If you have a blog feed that you would like me to consider, please let me know and I will include it in future editions.
This week’s winner is:
Mixed Signals from European Low-Power Designers – Pete Hardee talks about the unique challenges being faced by the European chip design houses
Other good blogs, papers and articles include:
Global Cowbell Fever Spreads – We Are Launching 12 “UVM SystemVerilog Basics” Videos in Chinese - Axel Scherer
FinFETs, Tri-Gate Transistors Promise Low Power – But Pose Some Design Challenges – Richard Goering
Going to sleep – Colin Walls talks about sleep and hibernate in embedded processors.
Delivering Accurate Project Schedules – JL Gray describes bell curves and miracles required.
Video: DVCon 2012 Digital-Mixed Signal Expert Neyaz Khan on UVM Mixed Signal – Joe Hupcey
A New Look at Device Modeling - Mike Jensen tells you how to create models using Graphical Component Modeling
Unmanned integration - J VanDomelen ponders to goodness of 30,000 unmanned drones.
User View: A 20nm Custom IC Constraint-Driven Flow – Richard Goering
Fear the Furby - J VanDomelen tells us why the Furby was banned in some establishments.
20 Questions on 20nm – And a New Resource for Advanced Node Design – Richard Goering
Happy Moon Landing - J VanDomelen talks about events that happened 43 years ago.
Where’s the Best Place to Put a Radiator in a Room? Part 2: PMV and other TLAs - Robin Bornoff with the long awaited sequel.
You Tried: It’s OK To Make a Change – Sean Murphy
Who REALLY calls the shots in chip design today? - Kurt Shuler says the software guys are calling the shots.
Brian Bailey – keeping you covered
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