Virtual reaggregation is necessary to re-aligning data dependencies that were split apart from disaggregation of the supply chain...
Lately, there has been a rise in predictions that the fabless business model is “dying”, or “collapsing”, or simply that it “no longer works”. The main argument centers on the disconcerting fact that a disaggregated supply chain makes optimization of the semiconductor product increasingly difficult to achieve, especially when coupled with the inherent complexity of advanced process nodes and leading-edge designs. In particular, the data interfaces between design teams, foundries, and EDA vendors are becoming increasingly complex. The result is a dramatic increase in cost, and more importantly, risk.
We can clearly see that economics drives business model transitions. In any growing ecosystem, specialization and segmentation will deliver more focused areas for competition and optimization in the marketplace, enhancing value for all suppliers and consumers alike. However, there are also technology-driven forces, moving in the opposite direction, requiring tighter integration.
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Technical complexity has expanded in two simultaneous directions. First, system complexity represents the increasing amount of design content and diversity of content types (digital, analog, RF, software). Second, silicon complexity represents the increasing amount of physics detail required to build chips at shrinking process nodes. So, while economics has forced disaggregation of the supply chain, the increasing technical couplings require just the opposite.
The solution to this dilemma is what I call “virtual reaggregation” across the supply chain, specifically with respect to the technical data and formats. This explains why there have been so many new standardization efforts not only in emerging areas, but also in long-established areas formerly satisfied without standards.
Standards in any industry provide the necessary glue for efficient commerce whenever many entities are involved. In the semiconductor industry, however, we deal with huge volumes of data to describe a chip and requiring precise detail. To make matters worse, we rapidly increase both system and silicon complexity, while simultaneously advancing our process node foundation. Failure to properly pass the exact, correct chip data between companies can literally cost hundreds of millions of dollars in lost market opportunity.