Algotochip has announced the availability of a research report from Semico Research that states the researcher’s belief “that the Algotochip design methodology offers a very good alternative to the current SoC design flows employed today.”
According to Algotochip, the semiconductor industry is faced with several substantial issues—not the least of which are the continuing rise in design costs for SoCs (System-on-a-Chip), the decrease in the incidence of 1 time effort designs and the increase in the design cycle time against shrinking market windows and decreasing product lifetimes. An additional factor has now been added to SoC design costs with the emergence of the very complicated software applications intended to run on the SoC silicon. The costs of the software effort have outstripped the silicon design costs and have become the major part of the cost in most of these designs.
Algorithm-to-chips is Algotochip’s mission. They turn algorithms into chips by converting behavioral algorithm C-code into architecture C-code into RTL into GDS-II. Their Blue-Box product automates the entire development cycle of a digital device in 8 to 16 weeks beginning with the algorithm input which is represented in ANSI C language, through to the GDS-II, which is in a tape-out form to the foundry. According to their website “Algotochip's system automatically optimizes the SoC's performance, and minimizes the SoC in area and in power consumption by iterating the entire development from the architecture to physical design. It also generates software, architecture, verification, SDK such as Compiler, Assembler, Simulator and Firmware for the automatically generated hardware (including DSP and/or microcontroller). Documentation is also provided.”
Although these problems may seem insurmountable, Semico believes that the Algotochip design methodology offers a very suitable alternative to the current SoC design flows employed today.
“Not only is Algotochip able to make the silicon design effort more efficient by reducing design cycle times and design costs,” said Richard Warzyniak, Senior Analyst. “Their design approach can offer customers the opportunity to have more designs completed in less time and for less money than competing alternatives.”
The report addresses several of the interrelated issues that impact SoC designs. Topics covered include how economic turmoil, raising design costs and unpredictable demand inhibit a company’s ability to deploy the latest innovations.
While I trust that Semico did a complete evaluation, they don’t really have skin in the game, so I am still on the fence until I hear a paying customer say they have used it and are happy with the results.
Brian Bailey – keeping you covered
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