SAN FRANCISCO--The beauty of this industry is its relentless change.
Yes, sometimes it can be horrifying, especially when your pride and
joy (and successful) technology just got disrupted by something
totally unexpected, but that's what keeps us honest.
The challenge we have as engineers, business people and observers is
to try to anticipate just what form the next change looks like.
Take programmable logic, which was itself a disruptive technology
when it roared onto the scene in the 1980s. For the first two
decades of its existence, programmable logic--particularly
FPGAs--played an excellent design role as glue logic and prototyping
But as Moore's Law progressed, FPGAs got smaller and more
powerful, and new opportunities arose. First came microprocessor
cores--some home-grown by FPGAs, others licensed from IBM or ARM or
MIPS. Quickly other IP cores started weaving their way onto FPGAs,
memories, phase-locked loops and the like.
Today, it seems to me, FPGAs are at a crossroads. I thought about
this on a conference call with Mahesh Tirupattur, executive vice
president with clocking and interconnect cores vendor Analog Bits,
and Paul Ekas, marketing vice president with Microsemi Corp. They
carved out some time in their day to talk about Microsemi deploying
Analog Bits' Serdes ip in its SmartFusion 2 SoCs. The ip is aimed at
serving applications such as PCI Express Gen1/Gen2, up to 10G
ethernet and other interfaces.
Make v. Buy
This was a make or buy decision for Microsemi.
"This was a major de-risking for us," Ekas said. "We're new to
transceivers. We had to make sure whatever we got into the product
worked. They have a track record of delivery." (Analog Bits has
supplied PLLs to Microsemi for some time).
This is an intriguing comment from a company (Microsemi) that does a
fair amount of its own ip development, while also buying
microprocessor cores from ARM and memory-controller cores from other
So, over time, what value proposition will FPGA vendors provide?
Today, it's their programmable fabric, but that piece of real estate
in some cases is shrinking relatively to other blocks on ip on chip.
And you're stuck using their back-end tools. Often that's OK, but in
an open-source, plug-and-play world, how long can that last?
"We recognize in the end, that what the customers are doing is
trying to deliver more performance and lower cost or lower power at
lower cost with limited resources," Ekas said. "And they take that
in environment that moves quickly forward."
"The enablers are the fabric and integrating (ip) responsibly to the
market segments," Ekas said.
It's a platform world (Ekas used the word and Xilinx is pushing that
positioning big time), but whose platform and what form will it take
in the years ahead? And, if more of the value of an "FPGA" is
derived from specialty cores, what's to prevent something/someone
from disrupting the function of the fabric?
I know some of you out there are working on this in one form
another. Let us know what you're doing.
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.