FPGA prototyping and emulation market seems to be like the game of Whack-a-Mole.
As soon as one of the companies in this crowded market is purchased, another
one appears. Synopsys was the latest acquirer getting EVE and the newly
emergent FPGA prototyping developments from Springsoft. Now we hear about a new
company who has a 25 million gate FPGA prototyping system – Reflex CES.
are the days when a prototyping company tries to do it all and in many cases
you have to ask which is more important – the hardware or software, something
reminiscent of many other products developed these days. The tasks of
partitioning, mapping, debugging the design and connecting the design up to
testbenches, virtual models and even to the real-world take a lot of time and
new company is Reflex CES - located just outside of Paris, and very close to
the location where Mentor’s emulation efforts are centered. It must be
something in the water there that makes people want to build such things.
Reflex has been working on FPGA-based systems for embedded systems, primarily targeted
towards military applications. Now they want to utilize their skill set to
construct a more general purpose product. This is also similar to the
development of Mentor’s (Meta) emulator which was originally funded by the
French military). However, there do not seem to be any other similarities between
a typical chip requires multiple FPGAs and this is both difficult and time
consuming and thus partitioning is important. When more than one FPGA is used
you need to have high-speed communications between them and that adds to the
skillset required to create a prototype.
European program brought three companies together to create the product and
Reflex is the primary company that sells the entire product. The other two companies
are Flexras and Adacsys. Flexras provides the partition tools that take a design
and divide it between the available FPGAs and Adacsys has a suite of functional
verification tools that extend the capabilities of the built in ChipScope
FPP25 prototyping platform operates with a GbE interface, a USB interface or a
4-lane PCIe cable (GEN2). A single FPP25 platform can emulate up to 25-million
ASIC gates using three high density Virtex-7 FPGAs (two XC7V2000Ts and one
XC7VX485T). The third FPGA is primarily used for interfacing. Each Virtex-7
2000T FPGA intercommunicates by nearly 400 LVDS signals at 1.25Gbps. An onboard
CPU with an embedded Linux operating system is implemented to handle the
configuration and monitoring functions. FPP25 platforms can be chained together
(up to 5 platforms) to address high density designs of over 125 million ASIC
are also working on things such as Gigabit Ethernet daughter cards and will
have several others available later this year. They are also developing a board
using Zynq Z-7045 so that it can be used for ARM SoC prototyping.
will be looking for early customers in France but hope to sign up distributors
in the US and Asia as well. They hope to target small to medium sized projects
and initially will be looking towards the hardware guys for chip verification
opportunities and later for software verification and validation.
– keeping you covered
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