Accellera Systems Initiative (Accellera) has announce at DVCon today that they have partnered with the IEEE Standards Association (IEEE-SA) to deliver an electronic design and verification standard to engineers and chip designers worldwide. The revised version of the IEEE 1800™ "Standard SystemVerilog—Unified Hardware Design, Specification, and Verification Language Reference Manual” is now available through the IEEE Get Program, which grants public access to view and download select IEEE standards at no charge.
IEEE 1800 is the third standard to be delivered in partnership with the IEEE-SA Get program, joining two others: Get IEEE 1685™ Standard: IP-XACT, Standard Structure for Packaging, Integrating, and Reusing IP within Tool Flows, and Get IEEE 1666™ Standard: SystemC® Language Reference Manual.
Companies, universities, research institutions, and individuals worldwide can access the standard and develop applications for SystemVerilog tools and technologies. To download a PDF copy, visit http://standards.ieee.org/about/get/index.html#get1800 Brian Bailey
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