Bluespec is introducing a high-speed verification and hybrid prototyping solution for RTL IP that they claim eliminates many of the problems of FPGA prototypes at simulation prices...
Companies that want to use both simulation and emulation have long faced issues related to getting the design up and running on an FPGA fabric. While the top emulation companies create custom chips to make this feat easier, there are still a large pool of companies that want to use the cheaper and faster alternative and yet at the same time do not want the hassles that comes from having to modify the design manually to work correctly on an FPGA. Bluespec says it has a better way. They claim to have a Connect, Build & Go™ strategy that will get you up and running in less than a day. The heart of it is Semu™, (Semu, pronounced see-mu, symbolizes attributes of both simulation and emulation) a software solution that they say delivers emulation speeds at simulation prices. Sounds intriguing doesn’t it? They claim that it can also integrate RTL IP into SystemC/C/C++ Virtual Platforms thus enabling hybrid prototyping for high-speed, hardware-accurate presilicon software development. Sounds even more intriguing…
So, some of the details: Semu connects to standard, low-cost Xilinx FPGA development boards through a Linux PC thus providing a desktop solution.
- Imports RTL IP designs, with build automation, into FPGA emulation
- Generates a host-based C API to easily connect models and test benches to the design-under-test (DUT) – interfaces can be at both signal and transactional (TLM) levels
- Connects designs to the host, seamlessly including transactors and PCIe-based co-emulation link
Semu provides dynamic visibility and hardware breakpoint capability against 100% of the register state in a design at any time to give a debug experience that feels more like software than hardware. Dynamic debug eliminates the requirement to frequently re-instrument and re-synthesize, so debug iterations can be performed in minutes, not hours or days.
Semu is a software package that runs on a Linux PC and provides an easy-to-use GUI for project configuration, build, run and debug. Semu includes ready-to-use Verification IP (VIP) templates that users can leverage to bring up designs quickly. Semu will initially support Verilog designs up to 2 Million gates when used with a Xilinx ML605 board. Support for additional Xilinx FPGA-based boards will soon provide higher capacities up to 14 Million gates.
Bluespec: Simplifying Complexity, while Delivering Extreme Flexibility Semu integrates dynamic debug, design-specific transactors, high-performance co-emulation, and the power of FPGAs all within a simple GUI and C APIs for Verilog designers. Bluespec’s synthesizable modeling is the key technology that enables bringing such complex, extremely flexible systems as Semu to market. Furthermore, it enables delivering the rich roadmap of transactors, verification IP, and next generation debug planned for Semu.
Pricing and Availability
Semu is available now at pricing that starts at $9,500 for a time-based license and maintenance.Brian Bailey
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