Mobile applications constitute one of the key growth markets for memory, outpacing traditional compute platforms in the post-PC era. As performance and functionality demands increase, mobile applications impose ever more stringent requirements on memory technology. Users want their phones to do everything, weigh nothing, run for days on a single charge, and cost a pittance. Taken as a whole, it’s quite a task, and one that depends on the memory industry to deliver. Want to get a better understanding of device requirements, testing strategies, and new standards under development? Look no further than JEDEC’s Mobile Forum 2013 (May 1 and 2; Santa Clara, CA). The two-day meeting features a full slate of presenters, many of whom are involved in the standards committees.
Start off with the big picture, Qualcomm style. First, Richard Wietfeldt will set the stage with a keynote focusing on the memory roadmap and key challenges for the device ecosystem. Later, Hung Vuong will review JEDEC mobile memory requirements and roadmap, including updates on LPDDR4 & Wide I/O 2, as well as storage solutions including UFS 2.0 & e.MMC 5.0.
You can’t design memory unless you understand the requirements of the application. Users expect today’s smart phones and tablets to deliver the type of high resolution graphics and video they used to find their desktop systems. In a special session, James Bruce of ARM talks about new trends and the demands placed on memory for tomorrow’s low, mid, and high-level devices.
LPDDR3 might have been released just a few months ago, but the JEDEC committees are already well into the process of crafting the LPDDR4 spec. Just as DDR4 represented a sea change compared to DDR3, LPDDR4 promises new directions and a major leap forward. The Mobile Forum has several sessions spotlighting LPDDR4, including a presentation by Minho Kim of SK Hynix that focuses on key attributes of the new standard and how they will inform design. Meanwhile, Marc Greenberg, Synopsys does a compare and contrast among LPDDR2, LPDDR3, and LPDDR4.
Get a better understanding of JEDEC’s newly released universal flash storage (UFS) test standard from Agilent’s Perry Keller, member of the Board of Directors of the Universal Flash Storage Association. He’ll be reviewing the requirements and process for characterizing and certifying UFS designs. Other test sessions include Cecil Ho of CST talking about practical test strategies, systems, and flows for mobile memory devices and Prashanth Thota of Tektronix reviewing characterization and verification test of embedded designs deploying LPDDR3 technology.
Those are just a few highlights from the session. For more information or to register, click here.
I attended a LPDDR3 workshop last fall through JEDEC and the information was invaluable- I highly recommend it! For anyone looking for Test and Measurement LPDDR information Agilent offers a free Memory Resoure DVD with applicaiton notes, technical papers, videos and more www.agilent.com/find/hsd-achieve
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.