The "collaborative advantage" tagline for this blog series is well exemplified by the public announcement this week that the OpenDFM standard has achieved production support status for process nodes down to 28nm, and development support through 20nm. This is a “Big Deal”. Why? Because of the amount of practical value it adds to industry, the level of investment and collaboration required to pull it off, the quantity and quality of contributions made into OpenDFM, and the innovative architecture used to solve a problem where no standard solution was apparent. The full release is at: http://www.si2.org/?page=1652.
Let’s talk value first. OpenDFM allows designers to maintain one source for verification runsets across all major DRC engines. This greatly reduces development costs with no impact on performance or quality, improves consistency with design rule manuals, and improves PDK automation. It uniquely enables “data prep retargeting” operations, now being used at IBM down to 14nm to improve yield. Companies like Texas Instruments, IBM, Intel, Mentor Graphics, and Cadence are all quoted in the release.
This was no typical standards effort. It began with aligning industry definitions of precise DFM terminology, architecting the approach for implementation from scratch, defining a language for DFM / DRC checks and APIs for vendor plug-ins, custom software development of parsers and regression aids, eight technology contributions, and rigorous quality testing. When foundries are banking their silicon quality and delivery on a new standard, it needs major testing. OpenDFM v2.0 achieved 100% identical results with just 5% runtime performance hit) on over 600 test cases covering “every function and every parameter”. This was a major investment by DFMC members, including technology contributions from IBM, Intel, GLOBALFOUNDRIES, Mentor Graphics, STMicroelectronics, Synopsys, Texas Instruments, and TSMC. We thank all these companies for their helpful support.
The next version of OpenDFM [v2.1], already in work, integrates full FinFET support and DRC+ pattern matching technology for improved design and yield centering, and should enable production support to 14nm and below.
OpenDFM also integrates another new Si2 standard, the Unified Layer Model [ULM]. ULM provides consistent functions for layer operations across OpenDFM, OpenAccess, and OpenPDK, and is especially useful at leading-edge process technologies.
To learn more about OpenDFM, ULM, and many other Si2 standards, please visit us at booth #1427 at the Design Automation Conference in Austin, TX, June 2-6. A complete schedule is located at: http://www.si2.org/?page=1651.
Steve Schulz is president and CEO of Si2
More Collaborative Advantage blogs are available for your reading pleasure.
Recent entries include:
Rapid progress in silicon photonics standards
Si2 celebrates 25 years at DAC
OpenPDK releases ESD design spec; IRPS 2013
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