This is a roundup of news or activities in the past few days that may be of interest to people.
Standards related news
Accellera Systems Initiative has partnered with the IEEE Standards Association (IEEE-SA) to deliver IEEE 1801™-2013 “Standard for Design and Verification of Low Power Integrated Circuits Language Reference Manual” and is available through the IEEE Get™ Program. The standard, which was approved by one of the largest entity-based ballot groups in IEEE-SA, is intended to enhance and improve the energy efficiency of devices by focusing on low power intent (a specification of the planned power-management architecture for a given design) and energy management in chip design.
Accellera has also named Dr. Stanley Krolikoski as the recipient of its annual Leadership Award. The Award recognizes the vision, leadership and contribution to standards development, governance and promotional activities of the organization. The Award was presented at the Design Automation Conference. Stan has served as an officer of several standards initiatives for over 25 years. These include the VHDL Users’ Group / VHDL International (VI), Open Verilog International (OVI), Analog VHDL International, Accellera, Open SystemC Inititaive (OSCI), and The SPIRIT Consortium.
The IEEE has also announced the launch of the IEEE Standards Association (IEEE-SA) Symposium on Electronic Design Automation (EDA) Interoperability. The event—scheduled to take place 24 October 2013 in Silicon Valley—is intended to help members of the electronics/semiconductor design and verification community better understand the landscape of EDA and semiconductor intellectual property (IP) standards, as well as the role of these standards to address industry interoperability challenges.
As part of its 50th anniversary celebration, DAC 2013 will honor the geographic breadth and global reach of electronics innovation by organizing a unique and informative venue at DAC: the DAC Global Forum (DAC-GF). Over 30 countries will participate in the DAC-Global Forum, celebrating with DAC attendees the contributions each nation has made to the field of electronic design and showcasing future opportunities. A dedicated pavilion, #137 on the DAC floor, will feature interactive presentations by representatives from each country.
The Silicon Integration Initiative (Si2) announced the release of a Power Distribution Network Standard for 3D Integrated Circuits under the auspices of the Open3D Technical Advisory Board (TAB). The 3D-IC Design Exchange Format Standard for Power Distribution Networks (PDN) describes a unified interface protocol for both Power/Ground and signal ports for die-2-die, die-2-package and package-2-PCB interfaces. This also allows the creation of compact SPICE-level descriptions to aid in the design, analysis and optimization of the resulting networks that define these interfaces to ensure they meet the requirements for power and signal integrity. The standard is available for download at: http://www.si2.org/?page=1657.
The Silicon Integration Initiative (Si2) and TechAmerica have announced the transfer of the Compact Model Council (CMC) to Si2. All future development, research, administrative, marketing, and accounting activities of the CMC will be carried out under the bylaws and operating procedures of Si2. The CMC will be renamed the Compact Model Coalition to blend with Si2’s organizational structure.Brian Bailey
– keeping you covered
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