NAND flash memory won’t scale forever. As gate sizes shrink, endurance drops, making the development of next-generation non-volatile memory (NVM) a matter of increasing importance. Indeed, analyst Yann De Charentenay at Yole Développement expects the NVM niche memory markets to reach $2 billion by 2018. Will NVM eventually replace DRAM and NAND? Attend the 2013 Memory Workshop at the Innovation Days event held by Leti, the technology transfer arm of the French research and technology institute, and find out. De Charentenay kicks off the one-day workshop, which features an array of speakers from industry and academia covering some interesting-looking topics, including:
“Embedded 1T Flash NOR: still alive at 40 nm. And beyond?” Christian Boccaccio, STMicroelectronics
“Downsize scalability of STTRAM to and beyond the 20nm node.,” Bernard Dieny, CEA-Spintec
“Phase Change Memories Take Their Role in the NVM Arena,” Paolo Cappelletti, Micron
“Design Exploration of Hybrid IC using CMOS and ReRAM technologies,” Olivier Thomas, CEA-Leti
Verification remains a key issue in system-on-chip development. The time taken to verify a high-density SoC design to a high level of confidence can lead teams to think the unthinkable. One of these counterintuitive options is to not exhaustively verify a chip before taping out but use the resulting silicon itself as a cornerstone of the verification process.
Work by a team at the University of Oxford and the University of Exeter may well become recognized as the first steps on the road to a new and bright optoelectronic future for phase-change memory materials.
Join our online Radio Show on Friday 11th July starting at 2:00pm Eastern, when EETimes editor of all things fun and interesting, Max Maxfield, and embedded systems expert, Jack Ganssle, will debate as to just what is, and is not, and embedded system.