IP integration is becoming a very important and difficult issue. What needs to happen to make this easier? Are we developing the right standards?
This blog is a continuation of the series of industry opinions about various aspects of the IP industry. The first part tackled the question “What will the IP landscape look like in the future while the second part looked at “How much of the chip does IP fill?” Then we turned our attention to verification IP and asked about “Penetration of verification IP?
Today I am looking at standards for IP adoption and asked - IP integration is becoming a very important and difficult issue. What needs to happen to make this easier? Are we developing the right standards?
Michael Munsey, Director of Product Management, Semiconductor Solutions at Dassault Systèmes.
We need to look at the entire IP supply chain and how IP is being delivered to, and used by, customers. As more and more companies enter the IP market, and as the complexity of IP increases, it will create challenges for both IP suppliers and IP users. IP suppliers will need to be able to manage their IP in ways that they have not had to before. IP Suppliers will need to keep track of who is using what IP and which version of it. There will also be a configuration management issue, due to IP suppliers needing to keep track of which version of verification IP are being used with which versions of design IP, and also which versions of software IP might be paired with different versions of hardware IP. If they need to update their IP, all this configuration information will become vital to understand which customers need the updates, and also to guarantee that the configurations of different types of IP are all kept in sync.
IP consumers will need efficient and effective ways of sourcing their IP, as well as a clear understanding of where the IP was sourced from and that they are using the right configurations of IP. They will also need to track their designs based on the versions of IP used even after they have been shipped in case of issues with a version of IP that may have been corrected in later versions. In effect, they will need to keep service records of the products their customers are using based on the version info of the IP that was used in their designs.
John Koeter, Vice President of Marketing, Solutions Group, Synopsys
At Synopsys, there are a number of approaches to addressing the increased complexity of IP integration. The best is providing our customers with complete solutions for an IP block. For example, we package the PHY, controller, verification IP, and TLM models with an easy-to-use configuration tool that lets the user pick the options that they want, the system bus interface, and other parameters, and then generates all the required files for easier IP integration. Synopsys also offers IP integration services as part of our comprehensive support package. It includes design reviews, application notes, user documentation, local engineering support and more.
Susan Peterson, Product Marketing Group Director and Tom Hackett, Senior Product Marketing Manager, Cadence
For customers building SoCs today, the biggest effort is spent in integrating IP from both internal and external sources, along with the associated firmware and driver software. Most of the time and effort for integration is spent verifying that all the IPs work together, along with software that controls them. On the one hand, customers want to use more and more off-the-shelf IP and focus their development efforts on their differentiated IP. But then, every customer also needs the IP to be highly customized and tailored for their SoC application. While standards can help, a more significant impact can be made by EDA and IP vendors by focusing on three areas to reduce the time to SoC integration:
- Enable customers to easily customize the IP and then rapidly deliver this tailored IP, fully verified, in a way that is optimized for integration with associated driver software and verification IP
- Develop an easier and more systematic approach for SoC verification
- Provide automation for streamlining IP-based SoC development
Bernard Murphy, CTO of Atrenta Inc
More automation, but the automation cannot start with a requirement of major methodology changes. It needs to be an evolution on top of existing RTL design flows that will help where needed with restructuring designs, adding standard integration logic, supporting integration verification, etc.
Eran Briman, VP of Marketing, CEVA
For processor IPs, there are 2 types of integration – hardware and software. On the hardware side, the de-facto standard is the AMBA interface, which keeps evolving, and we are closely following that, including supporting ARM’s ACE protocol for cache coherency which we announced recently. On the software side, as answered in the previous question, we have a new framework to allow customers to directly run software on the DSP in Android-based application processors, which significantly simplifies software development and improves overall performance of Android-based systems.
Arvind Shanmugavel, Director of Applications Engineering, Apache Design, Inc.
As we see more IP being integrated onto the same SoC, there is an increasing need to verify the IP within the context of the SoC. For instance, power integrity and reliability checks need to be performed on the SoC with all the IP in place. IP typically shares the same power delivery network at the SoC-level or at the package-level. An IP model that can accurately represent the switching behavior is necessary for SoC sign-off.
IP vendors need to have a standard model that can capture the behavior of the IP at various operating states for power integrity. When the IP is used in the SoC, the appropriate state of operation should be chosen for the verification. Simulations such as dynamic voltage drop need to be performed with all the IP switching in the correct states. Power integrity models are typically not standardized in the industry. Different EDA platforms have different requirements for verification. A unified model that can capture switching states and electrical information for power integrity is necessary for IP.
– keeping you covered
If you found this article to be of interest, visit EDA Designline
where you will find the latest and greatest design, technology, product, and news articles with regard to all aspects of Electronic Design Automation (EDA).
Also, you can obtain a highlights update delivered directly to your inbox by signing up for the EDA Designline weekly newsletter – just Click Here
to request this newsletter using the Manage Newsletters tab (if you aren't already a member you'll be asked to register, but it's free and painless so don't let that stop you).