You can't help but take your hat off to Xilinx and TSMC for the first use of high-k metal gate technology in an FPGA application.
One of the benefits of being involved with the Insight Awards program is we often get a chance to evaluate leading-edge process implementations in new technology. In our analysis of one of the nominees for Most Innovative Process Technology, we had to take our hats are off to Xilinx and TSMC for the first use of high-k metal gate (HKMG) technology in an FPGA application.
Xilinx: A history in process innovation
Xilinx began life in 1984 using a fabless business model to manufacture its first chips, with Seiko and Monolith Memories as early foundry partners. As they moved from the 65-nm process node to lower nodes, Xilinx worked with UMC, Samsung and Toshiba to manufacture its FPGAs. Most recently, however, Xilinx has adopted TSMC's HKMG process to fabricate not only its leading-edge Kintex-7 family of FPGAs, but all their upcoming devices; including the Artix-7 and Virtex-7 FPGA families and the Zynq-7000 EPP family. This decision to migrate their entire product family places Xilinx at the forefront of the 28-nm process node.
The Kintex-7 family of FPGAs, fabricated using TMSC’s 28 nm high performance-low power process (HPL), offers low power consumption and high performance. Its target markets include next generation broadcast video-on-demand systems and next generation wireless networks among others.
The Kintex-7 device can be configured to support multiple air interfaces such as LTE, WiMAX, and WCDMA and provides built-in support for eight-channels of PCI Express (Gen1/Gen2). The Kintex-7 FPGA family of devices also takes advantage of the scalable Xilinx architecture to simplify migration from previous generation (40-nm) Virtex-6 FPGAs.
Speaking of migration, the industry’s transition from the 65-nm node, based largely on polysilicon gates and strain engineering, to metal gates with high-k gate dielectrics has proved difficult for many foundries, with the transition being fraught with technical difficulties and high costs.
Looking back at the introduction of HKMG process technology, Intel was the first to make the move to metal gates, with its 45-nm gate-last process. With TSMC as the second foundry to offer a similar gate-last metal gate process. Intel’s competitor, AMD has only recently brought its gate-first metal gate process into production for its 32-nm process node while Panasonic has adopted a metal gate with an overlying polycide for its gate-first metal gate process.
TMSC and Intel inked a deal in 2009 that saw production of some Intel Atoms and Atom-based SoC’s being migrated to TSMC. This appears to be a canny move by TSMC as the deal appears to have included the gate-last metal gate process that Intel had used at its 45-nm node. And the Kintex-7, fabricated using TSMC’s HPL process, takes much advantage of this same technology.
Xilinx chose the simpler HKMG process as it reduced risks that came from straight High-Power (HP) or (LP) 28-nm processes. Choosing a high-performance, low-power (HPL) approach with HKMG avoided any yield and leakage issues seen with the embedded SiGe process used in the 28-nm HP process, while delivering a more cost-effective (from a manufacturing perspective) process solution. The larger voltage headroom in the HPL process also permits the selection of an operating VCC at a wider range of values resulting in a flexible power/performance strategy.
Choosing the HPL approach also provided Xilinx with the ability to avoid complex and expensive static power management schemes in the FPGA design, allowing the company to focus of developing a unified architecture across their 7 series FPGAs (such as the Artix-7 and the Virtex-7). This unified architecture provides numerous benefits to designers such as easier upward and downward migration across different FPGAs devices and families, customer code and IP reuse and common blocks (such as block RAM, DSP, I/O, clocking, interconnect logic, and memory interfaces).