The CTO of MonolithIC 3D delves into some of the issues surrounding through silicon vias.
Editor's note: The author is chief technology officer at MonolithIC 3D Inc., which has developed a technology for 3-D ICs that is fundamentally different from through silicon via (TSV) technology.
Have you read some of the recent through silicon via (TSV) headlines?
Jan. 31—CEA-Leti launched a major new platform, Open 3D, that provides industrial and academic partners with a global offer of mature 3D packaging technologies for their advanced semiconductor products and research projects.
March 7—Semiconductor fab equipment supplier Applied Materials Inc. opened the new Centre of Excellence in Advanced Packaging at Singapore's Science Park II with its partner in the endeavor, the Institute of Microelectronics (IME).
March 26—Semiconductor design/manufacturing software supplier Synopsys Inc. is combining several products into a 3D-IC initiative for semiconductor designers moving to stacked-die silicon systems in 3D packaging.
It is amazing to me that after so many years of development and effort and great presentations we are still not in a full production and still basic R&D as well as EDA still in infancy.
Most people in the industry consider Merlin Smith and Emanuel Stern of IBM the inventors of TSV based on their patent "Methods of Making Thru-Connections in Semiconductor Wafers," filed on December 28, 1964, and granted on September 26, 1967, as shown below in patent No. 3,343,256.
Figure 1: IBM TSV patent.