The indispensable element in the next-generation set-top box is a decoder chip capable of handling all the highly compressed video streams.
Four-year-old startup Argon Design, whose lead engineers came from the UK-based chip company AlphaMosaic, has created what the company calls "the industry's first comprehensive validation suite for the HEVC specification." The first version of the company-designed evaluation suite will become available at the end of this month.
The 15-person company has produced a suite of HEVC bit streams that test and verify the complete space of valid HEVC bit streams. "Because we are coming from a chip-design background, we created this from the user point of views," Scott said.
The team created a pseudo code -- "sort of a mix of English and mathematical description," according to Scott -- out of the HEVC spec.
They wrote a compiler for the HEVC specification that directly understands the pseudo-code and equations contained in the HEVC spec.
By creating a mathematical model of the entire coding process, Argon Design produced a comprehensive set of HEVC-encoded bit streams. The team also created a tool that details exactly which sections of the spec are covered by any set, or subset, of a bit stream.
The resulting coverage report is cross-linked to an interactive version of the HEVC specification that highlights exactly which sections and equations are being verified, the company explained. The tool, in turn, will help chip designers to find incompatibility between a decoder and an encoder, said Scott.
When asked about the company's track record for tool development, Scott said that his company started out as a technology consultancy.
Apart from Argon Blaster, a tool developed to verify 10 Gbit/s network equipment based on the Netronome Flow Processor, Argon Design's newest product is the HEVC validation suite the company announced this week.
Argon Design has been using Argon Streams and Argon Coverage Tool to verify the HEVC reference decoder developed by the standards body. "This process has already resulted in over 40 issues with the HEVC specification and reference decoder implementation being reported back to the standards body," Scott said.
There's an incumbent company, Allegro VDT, located near Grenoble, France, experienced in producing compliance bit streams designed for intensive testing of H.264/AVC/MVC/SVC decoder implementations.
Along with Allegro, Sarnoff also offers tools for HEVC. But both Allegro and Sarnoff offer syntax streams, "based on the own encoder implementations rather than being derived directly from the specification," according to Argon Design.
The French company showed off earlier this year its HEVC/H.265 Hardware Decoding IP, billed as "the world first HEVC/H.265 hardware decoder IP" based on an unprecedented multi-core architecture.
Meanwhile, IP companies have also begun offering HEVC solutions.
Imagination Technologies last month announced a new PowerVR video decoder for HEVC. The PowerVR D5500 is a multi-standard, multi-stream video decoder with a multi-core architecture, "allowing performance to be easily scaled for high resolution or high frame rate applications up to full HEVC level 5.0," claims Imagination. Describing it capable of enabling "4K resolution content to be decoded up to H.265 L5.0 4Kx2K @ 60fps," the UK company says the new PowerVR D5500 video decoder is available now for licensing.
The competitive landscape for HEVC chips is now compelling Argo Design to roll out its own verification suite on the commercial HEVC market.