Of course, there's an entire conference devoted to signal-integrity in chip, board, and system design (DesignCon) and many published books on the broader subject of signal integrity. But let's take a moment to think specifically about signal integrity in high-speed interconnects.
In his latest article, "Analyze high-speed interconnects," Anil Pandy writes:
When designing high-speed applications, signal transmission quality is a critical factor. At gigabit speeds, high-speed interconnects must be characterized along with the RF board traces... To achieve good SI, the designer must not only understand the system in which the connectors will be deployed, but also perform SI analysis of the RF board along with the connectors.
Over the years, various 3D interconnect simulation techniques have emerged to improve the integrated circuit density and operation speed of multilayer, very large, high-speed board integration designs. However, these techniques often lead to impedance discontinuities that induce SI/power integrity and electromagnetic interference effects when the RF board and connectors are simulated separately.
One way to address this challenge is with hybrid EM simulation.
His article in its entirety discusses design and simulation, SATA and USB connectors, and presents data on signal integrity analysis of the system as well as post-layout analysis.
What do you see as the advantages/disadvantages to hybrid EM simulation (when the connectors or other 3D components are integrated with the RF board and simulated together using planar and 3D EM simulation along with a transient solver)?