This is a roundup of news and activities from the past week associated with EDA and IP.
Altium has released a range of component libraries for board-level designs using the ARM Cortex-M based EFM32 Gecko microcontrollers. (Energy Micro, which developed the microcontrollers, was recently acquired by Silicon Labs.) Available now from AltiumLive, the solution delivers board-level component models and corresponding supply chain information, such as real-time price and availability data from distributors and vendors (including Digi-Key, Arrow, and Farnell), directly to designers using the Altium Designer electronics design software.
Atrenta has built an R&D team in Sri Lanka. It now has 25 engineers working in Colombo and plans to have 50 there by the end of the year. I have heard of R&D centers in many places, but this must be a first in Sri Lanka. Atrenta has been working with the Universities of Peradeniya, Moratuwa, and Colombo to recruit local engineers. Dr. Ajith Pasqual, who runs the Department of Electronic and Telecommunication Engineering at the University of Moratuwaa, has joined Atrenta's Technical Advisory Board.
Mathworks' MATLAB and Simulink have been deployed to the International Space Station as part of NASA's Synchronized Position Hold Engage and Reorient Experimental Satellites (SPHERES) project. The bowling-ball-sized spherical satellites are used inside the space station to test well-defined instructions for spacecraft performing autonomous rendezvous and docking maneuvers. The space station crew, on-ground engineers, and guest scientists plan to study satellite servicing, vehicle assembly, and spacecraft configurations. Using MATLAB and Simulink, the team can test algorithms related to relative attitude control and station keeping between satellites, retargeting and image plane-filling maneuvers, collision avoidance, and fuel balancing.
SuVolta has benchmarked its transistor technology against conventional bulk CMOS using ARM Cortex-M0 processor core test chips. The ARM Cortex-M series processor was manufactured with Deeply Depleted Channel (DDC) technology on a 65nm bulk planar CMOS DDC process. When compared with an otherwise identical ARM Cortex-M0 processor manufactured in the conventional 65nm process with a 1.2V supply voltage, the DDC transistor-based ARM implementation operating at 0.9V demonstrates the following benefits:
- 50 percent lower total power consumption at matched 350MHz clock frequency
- 35 percent increased operating speed (performance) at matched power
- 55 percent increased operating speed when operated at matched supply voltage
Rudolph Technologies has released three new application-specific configurations of its NSX® 320 Automated Macro Defect Inspection System. The suite includes specially designed configurations for wafer-level packaging, 2.5D (interposer), and 3DICs using through-silicon via as interconnects.
Imagination Technologies is launching design optimization kits to give customers the flexibility to optimize for power, performance, and area in its GPUs, CPUs, and other IP core families. The kits contain optimized reference design flows, tuned libraries from partners, characterization data, and documentation. The first kit, which will be available this year, will target the PowerVR Series6 Rogue GPUs with a package of core IP and physical IP co-developed by Imagination and Synopsys.