The vast majority of design issues are directly or indirectly attributable to control loop stability. The most common offenders:
- Linear regulators
- Voltage references
The control loop stability of these devices can propagate through an entire system. Symptoms include:
- Increased circuit noise
- Clock jitter
These are all simple circuits, so why is this a common issue?
We are not clear on the definition of stability
In the high-reliability world, including satellite systems, where I do most of my troubleshooting, stability means a minimum phase margin of 30 degrees and a gain margin of 6dB at the end of life, including all component variations and environmental factors. There are guidelines that define the stability margin limits, and one of our tasks is to ensure that margin.
This requirement is not well aligned with the information given out by manufacturers. They generally do not provide quantifiable metrics for the stability of their devices. In many cases, the devices will not meet a 30-degree phase margin even typically when coupled with low-ESR capacitors. The definition of stability in the semiconductor world seems to be whether the circuit has a stability margin that is greater than zero.
Component manufacturers drive us to it through recommendations
In some cases, manufacturers provide recommendations. One example I often use is the REF02 voltage reference. The manufacturer's datasheet highly recommends the addition of a 0.1uF output capacitor on the voltage reference.
An excerpt from the REF01/REF02/REF03 Rev K datasheet.
The highly recommended output capacitor is shown in two different schematics in the datasheet.
One of the two schematics in the datasheet showing the recommended 0.1uF output capacitor.
Inability to measure directly
The results of following this recommendation can be seen in the ringing produced by a small signal step load.
Step load of the reference from 167uA to 437uA. The yellow trace shows the reference output voltage with the highly recommended output capacitor. The white trace shows the voltage without the recommended capacitor. The blue trace is the load current.
The results also show up in a VNA measurement of the reference output impedance.
Output impedance of the REF02 without (dashed line) and with (solid line) the recommended 0.1uF output capacitor.
One reason engineers get into so much trouble with the control loop stability of these types of devices is that, in many cases, the access to the control loop is not available, so it isn't possible to measure stability directly using traditional Bode plot techniques.
Even though measuring the phase margin directly is not possible, a non-invasive stability method shows the phase margin of the recommended circuit to be about 12 degrees in the typical case.