Embedded Systems Conference
Breaking News
Blog

Verification Panel: Are We Done Yet? Not Even Close

NO RATINGS
View Comments: Newest First | Oldest First | Threaded View
JanineLove
User Rank
Author
When are we done?
JanineLove   9/4/2013 9:35:34 AM
NO RATINGS
This reminds me of the issues in software test. There's no clear time to "blow the whistle and we're done" anymore. It is a bit scary. Especially with mission critical apps.

Graham Bell
User Rank
Author
Application Specific Static Formal Verification is Making the Difference
Graham Bell   8/28/2013 5:50:36 PM
NO RATINGS
At the Design and Verification Conference last February, there was a panel ("Where Does Design End and Verification Begin?") that discussed the impact of new verification tools that focus on just one problem area and thereby enable more effective verifcation.  Engineers no longer have to create a solution out of their own dynamic simulator, static analyzer, or ABV tools.   

In the example of Meridian clock-domain-crossing (CDC) verification,  a mix of structural, formal and dynamic methods operating under-the-hood, ensure that an SoC will not fail with a metastability issue.   Other examples are state-of-the art Lint analysis, and X-propagation and reset verfication / optimization.

At Real Intent, we call this new category Static Verfication.   Gary Smith calls them Verification Apps. I see these as important addition to our tool chest so engineers don't design SoCs that we cannot verify.

 


Flash Poll
April 2015 Cartoon Caption Contest: The Mighty Hamster
April 2015 Cartoon Caption Contest: The Mighty Hamster
Of all the exhibits in the Pre-Apocalypse Era Museum, Breek was always in awe of the unearthed details and true-to-scale reproduction of a technological creation space that the long gone humans had once inhabited.
145 comments
Like Us on Facebook

Datasheets.com Parts Search

185 million searchable parts
(please enter a part number or hit search to begin)
EE Times on Twitter
EE Times Twitter Feed