Apple's iPhone 5s release on Friday is a classic example of systematic incremental engineering. Many of the electrical components within the phone feature tweaks and improvements, cumulatively creating a phone that sets the standard in design. Whether this approach provides the necessary foundation to win against Samsung's continuing innovation remains to be seen.
Beyond the new A7 processor and the transition from LPDDR2 to LPDDR3, we've found interesting changes to the NAND flash and a change in the combo radio connectivity solution.
The NAND flash memory on the iPhone 5s is manufactured by SK Hynix (package marking H2JTFG8YD2MBR), conforming to its E2NAND3.0 standard.
E2NAND3.0 uses advanced error correction code (ECC), buffering, and processing to improve performance and reliability. The flash controller is centered on the eight-die flash stack in order to maintain timing symmetry. Die centering requires mounting the controller under the flash stack in order to maintain workable wirebond lengths. The NAND flash is manufactured in Hynix's 21-nm process, which it designates "2ynm class."