Research papers on novel forms of nonvolatile memory, grouped under the term resistance RAM (ReRAM), will dominate the memory topic at this year's International Electron Devices Meeting, set to take place at the Washington Hilton Hotel Dec. 7 to 9.
Whereas in previous years IEDM featured a great many papers on flash memory and DRAM devices, both these categories are conspicuous by their near absence from the advance program for the 2013 IEDM.
The change to a focus on ReRAM, magnetic RAM, and 3D memory research reflects the conventional wisdom that NAND and NOR flash memory will not scale far beyond 20 nm and that other nonvolatile memory structures must be found, explored, and understood.
IEDM 2013 does include numerous papers on phase-change memory, a form of resistance memory that has made it to commercial production with a 1 Gbit component implemented in a 45 nm process by Micron Technology. However, these papers mainly take the form of modeling and reliability studies, or detail the introduction of complexity to deal with pre-existing limitations of the technology.
However, there is one NAND flash memory presentation that is likely to be well attended. The Session 3.6 paper, written by engineers from SK Hynix is on NAND flash memory cells made using a process with minimum geometry at about 14 to 16 nm and using an air-gap between bitlines to reduce bitline-to-bitline interference. The abstract of the paper states that the use of the air-gap reduces bitline crosstalk to the level of the company's 2Y process generation and reduces the effect of process variation on threshold voltage. The result is a mid-1Xnm MLC NAND flash memory with "superior manufacturability and acceptable reliability," the abstract claims.
While IEDM is an academic research conference, this result supports the likelihood that the industry will continue to scale NAND flash to about 15 nm geometry before jumping back to coarser and easier to manufacture processes for 3D-NAND memories. (See: Intel outlines 3-D NAND transition.)