No matter how carefully planned and executed a PCB layout may be, if the design details are incomplete, vague, or unintelligible as conveyed to the board manufacturer, the project will be stalled or, worse, misinterpreted.
Regardless of which EDA tools are used to create the layouts, most PCB designs are output and sent to manufacturers as RS-274 Gerber files that graphically define the layers, combined with a drill file, a netlist, a board drawing including the PCB stackup, and a readme text with various notes and instructions. Turnkey orders also include a BOM file and coordinate data to drive the pick-and-place assembly of components to the boards. There is no common data format among the files. They're simply bundled together, compressed, and forwarded to the board fabricator and assembler to interpret.
What happens when the files arrive? They must be translated to the format recognized by the fabricator's CAM system, usually ODB++. Valor Computerized Systems developed the ODB++ format nearly two decades ago for transferring design data coherently from CAD platforms to the CAM systems the company sold to PCB manufacturers. Mentor Graphics acquired the company in 2010 and continues to update and market Valor CAM software, which has become nearly universal among PCB manufacturers for driving production equipment. ODB++ can provide a much richer description of a design than Gerbers can present, and it consolidates all the design data (drill file, netlist, etc.) in a common format that can be read directly by PCB CAM systems without human intervention.
Unfortunately, although PCB designers can easily output projects in the ODB++ unified file format from most CAD tools, Gerbers remain the default by force of habit. When a board manufacturer receives Gerbers, someone in front-end engineering has to identify how the data is expressed before a translation to ODB++ can be accomplished. Is the data in metric or English units? Are coordinates in absolute values from an origin or in incremental values? Is the coordinate data in 2,3 or 2,4 format? There is no fixed rule for naming layers, their types (plane, signal, soldermask), or polarity with Gerbers, as there is in ODB++, so the person in front-end engineering has to interpret the arbitrary designations assigned to the layers as received and rename the layers according to the manufacturer's protocol.
If there is a question about the data, the job must be put on hold until the designer can be reached for clarification. Delays can imperil product introductions, because prototypes have to be delivered quickly for testing to reveal whether the design needs revision. Worse, if the layer designations are misinterpreted, DFM analysis can be incorrect because different rules apply to different layers. Planning can be incorrect for manufacture, because layer types affect stackup, and layer thicknesses can be incorrect. Moreover, coupons for controlled impedance can be incorrect because layer types are used to create the coupons.
Imagine the overhead involved in preparing prototype designs for fabrication by a manufacturer that receives a hundred new orders daily. Clearly, such an intelligent, comprehensive, unified design-file format as ODB++ benefits the OEM as well as the PCB manufacturer. However, there is a concern about ODB++ in some quarters. Some CAD and CAM tool vendors worry that their implementation of ODB++ may be subject to future proprietary conditions by Mentor Graphics. Consequently, there is renewed interest in the open-source, intelligent format for PCB data transfer as standardized by the IPC. That open-source standard -- IPC-2581 -- is very similar to ODB++ and was originally put forth by the association in 2004. However, with few exceptions, it was not implemented by EDA companies, DFM software suppliers, or CAM tool vendors until an industry consortium formed in 2011 to update and promote the standard.
PCB designers should pay close attention to the standard, given the limitations of Gerber-based descriptions for accurately rendering their intent. The new iteration of IPC-2581 (version B) was just completed by the consortium. Industrywide implementation will soon begin, with CAD and CAM software releases anticipated in 2014. IPC-2581B incorporates an extensive set of attributes to define precisely what PCB designers expect manufacturers to build. It will accelerate fabrication, assembly, and testing.
As a demonstration project, consortium members Sanmina and Sierra Circuits independently fabricated a 12-layer line card for Fujitsu Network Communications (also a consortium member) from an IPC-2581A design file, as illustrated below.
This network line card is the first PCB fabricated by a US manufacturer directly from an IPC-2581 design file. (Click here for a larger version.)
The Fujitsu division output the design from a Cadence Allegro platform, had it replicated in a three-up array through Wise Software VisualCAM, and passed both the Cadence output and the arrayed design to Sierra, where it was loaded into Valor Genesis through an IPC-2581 input module Valor had just introduced. A few bugs were discovered in the Valor input module, but those will soon be resolved. Sierra Circuits found no flaws in the IPC-2581 transfer format itself after comparing the design output in that format from Allegro with the same design output in ODB++ format.
Please visit www.ipc-2581.com for more information about the IPC-2581 format.