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Can Hardware-Assisted Verification Save SoC Realization Time?

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SrivRagh
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Re: Application Specific Static Verification is Making the Difference
SrivRagh   11/11/2013 11:13:08 AM
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Indeed, static based techniques have taken-off in the recent past with simulation based flows becoming a bottleneck. With SoC having processing core and IP becoming more programmable, it becomes necessary after RTL sign-off to verify HW/SW interaction issues, application-level and performance scenarios. Guess, we cannot do away with simulation based techniques completely.

 

Graham Bell
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Application Specific Static Verification is Making the Difference
Graham Bell   11/8/2013 1:28:03 PM
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The software side of verification is also gearing up for renewed competition among the big vendors and verification-only companies like Real Intent.  They are delivering their next-generation SoC verification suites with a focus on specific areas of concern.  Clock-domain crossing,  X-verification and reset optimization, SDC correctness and consistency, are some of the areas that are receiving dedicated RTL analysis using static analysis. Static analysis is a mix of structural and formal techniques that let designers focus on verification and not on customizing the tool to attack a problem area. 

Besides raw speed, and capacity, the newest tools are addressing the data management for sign-off of these SoCs.   Smart reporting and assisted debug is a key requirement otherwise designers and verification teams will drown in a flood of analysis results.  All of this innovation and targeted investment will be making SoC sign-off manageable, if not easier.

+Graham

 


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