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Tips & Tricks: Creating a 2W+4R FPGA Block RAM, Part 1

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Just at the right (write?) time....
hamster_nz   11/13/2013 4:05:45 AM
Hi Alvie,

Just stumbled over this on twitter (#FPGA) - making use of this right now.

I resolved the conflict a cruder way - the addresses are compared, and if they match then the datain is registered to place on the dataout of the other port, and the enable of the read port is inhibited (don't know if I explained that correctly or not!).

However, this way is much cleaner.


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