Energy-efficient, complete solutions can be obtained only with optimal alignment across the pre- and post-silicon phases of energy optimization supported by unified design flows, abstractions, and formats.
Energy-efficient product design, for both portable and plug-load devices, leads the list of on-going engineering priorities.
While mobile device makers have been forced by consumers' insatiable mobility requirements and fierce competition to significantly improve battery life, fixed-power products have been slower to deliver better energy consumption characteristics.
But a combination of government mandates, rising energy costs, facility limitations, and a general movement to all things green makes energy efficiency a top-level concern for every type of electronics maker.
The basic principle of energy design and management for electronic devices is to optimize the electrical activity within the electronic circuitry without impacting user experience or intended purpose. During the (pre-silicon) energy design phase, also called power design in Electronic Design Automation (EDA), we focus on tuning the hardware structures, assuming certain nominal signal activities, voltages, and clocks.
In the subsequent (post-silicon) energy management phase we tune the voltages, clocks, and functional activities during the test-and-run time, assuming certain hardware characteristics of the device.
Energy-efficient, complete solutions can be obtained only with optimal alignment across the pre- and post-silicon phases of energy optimization, supported by unified design flows, abstractions, and formats.
This requires a fundamental shift in the design infrastructures currently in use in today's product development flow. We believe a Unified Hardware Abstraction (UHA) is needed to promote a holistic, quantitative, and reusable approach to energy design and management.
The energy design and management flow for electronic devices is disconnected and lacks the abstractions, formats, interfaces, and automated methodologies long established and standardized in functional design and verification of hardware and software. We have observed that the main disconnects on energy issues are at the handover points between various teams:
- From VLSI designers and IP providers to system integrators and power designers at the RTL level
- From system integrators to firmware developers at the core system software level
- From device developers and firmware developers to OS integrators at the OS API level
- From device developers and OS integrators to the application programmers at the application software level
In hardware design, apart from Spice, none of the structural or temporal design or verification abstractions contain consistent power or energy information.
This is not a surprise. We in EDA have been systematically abstracting away time and structure in favor of high-level behavioral abstractions in order to cope with the rapidly increasing complexities.
The current Unified Power Format (UPF), although very helpful, is effectively adding information about the structure of the voltage tree and states of the voltage domains. It has no information to help optimize energy of interconnected components in realistic settings, as it does not cover clock trees, functional operating states, and the unavoidable constraints among them. (As pointed out by one of the early reviewers of this text, the wider definition or just changing community's perception about UPF's power states could be the right first step towards the next UPF version or the new standard.)
In IP design, IP-XACT is focused on functional IP stitching, with no energy or power annotations.
The situation is similar with board-level tools. As a result of the lack of unified information and structure, informal spreadsheets containing power information extracted from component data sheets are still the main tool of power optimization engineers.
On the software side, the lower levels of the operating systems contain APIs to control power. Windows is relying on ACPI and ASL to enable easy OS porting to various platforms.
ASL descriptions feed the interpreter within the OS with information when and how to adjust the hardware. This can be used to change power states, but any notion of power or energy is not part of the description.
Linux relies on the Device Tree (DTS) to partially describe the underlying hardware and contains a couple of power management frameworks in the kernel (cpufreq, devfreq, runtime_PM, regulator framework, etc.).
Despite some attempts, like HWMOD contributed by TI, Linux lacks handover formalisms for efficient interaction with the hardware designers and device integrators. When it comes to energy management, probably the most sophisticated of the OSs is Apple's iOS, but it is well known as a closed ecosystem, both on the hardware and software sides, and thus not scalable to non-Apple products.
The emerging Internet of Things (IoT) will likely also add to the problem as designers look to optimized OS solutions for their specific system tasks. Interestingly, the OSs are not converging but diverging rapidly. This, without doubt, will add to the burden of systems designers looking for optimized performance and power.
At the firmware level, manually developed proprietary software solutions control the dedicated energy management processors and specialized hardware. Due to the lack of unified formats and aligned design methodologies, such solutions require either complete vertical integration of hardware, firmware, OS, and applications (similar to Apple) or forced distribution of "one size fits all" reference platforms to all customers, making it almost impossible to differentiate on energy performance.
United Hardware Abstraction solution
We see the solution in the development of a UHA, which starts with energy as the first and foremost objective and encompasses all design levels from the signal to the application software level, thereby enabling seamless collaboration among all participants in the flow -- from the VLSI designers to the device integrators and software programmers.
For EDA historians, you will recognize similar motivations that led to the development and adoption of hardware description languages (HDLs), namely VHDL, in the 1980s and 90s to achieve greater efficiency, multi-level consistency and interoperability, and improved documentation.
Besides the obvious political, environmental, and consumer pressures, from a technology perspective the timing is right for such an evolution in how we design for energy efficiency. Recent innovations in hardware and software require rapid improvements in energy design and management methodology. In particular:
- High complexity and granularity of clock trees and power rails require faster, finer, and smarter energy management.
- Multiple diverse OSs (e.g., RichOS, SecureOS, MediaOS) running on multiple heterogeneous processor clusters and non-uniform memories require sophisticated energy management synchronization.
- The apps paradigm and the reactive nature of modern electronic devices require energy-aware software design and software-aware energy management.
The good news is that trends in the semiconductor industry provide an unprecedented opportunity to implement greater energy efficiency. Transistors are inexpensive and allow us to put plenty of redundancies (organized as hierarchies) into the devices.
Initially we had memory and bus hierarchies; now processor and, in the future, subsystem hierarchies.
Hierarchy means multiple equivalent ways to do the same computation, which means we can have many devices contained in a single device -- e.g., a basic phone that allows months of use within the feature-loaded smartphone.
Solutions to these challenges must continue to guarantee shortest possible time to market through extensive reuse, full hardware IP protection, easy programming, and efficient collaboration.
A standard UHA provides a platform to address all of these challenges, mainly from an engineering perspective, by automating the design of power management software and hardware. But such an approach has broader benefits, including:
- Lowers the cost and shortens the time-to-market, as companies across equipment classes can share the same power management infrastructure
- Enables the introduction of formal energy description of equipment and automated generation of the power management software and hardware
- Fosters energy savings competition among manufacturers of various equipment classes
- Allows for unified run-time reporting and control of equipment's energy consumption
- Establishes tighter minimum energy efficiency requirements for higher energy savings and enables faster adoption of energy standards for future equipment classes
- Allows unified testing, measurement, and standardization procedures
- Brings together a larger pool of power management experts to focus on the same problem and improves technical education in academia
As pressure mounts on device makers to become more energy efficient, we expect to see an acceleration of the current conversation on UHA, with an emergence of sample formats and constructs as well as the design tools required to implement them.
— Vojin Zivojnovic is co-founder and CEO of AGGIOS Inc., a startup focused on the development of energy proportional systems. Vojin has 30 years of research, technical management, and business development experience in the semiconductor and EDA industry.
— Jim Hogan is the chairman of the AGGIOS Board of Directors. Jim serves as General Manager of Vista Venture Partners and Managing Partner of Vista Ventures LLC. He has been in the semiconductor industry for more than 33 years.