Design Con 2015
Breaking News
Blog

FPGA LVDS I/O as an Analog Programmable Comparator

NO RATINGS
View Comments: Newest First | Oldest First | Threaded View
Max The Magnificent
User Rank
Blogger
Re: Who, what, when, how?
Max The Magnificent   12/4/2013 3:43:13 PM
NO RATINGS
@William: I believe it is Stellamar...

Those are the lads -- great IP as I recall

MS243
User Rank
Manager
Re: Who, what, when, how?
MS243   12/4/2013 3:30:24 PM
NO RATINGS
I believe it is Stellamar -- they sell other IP and used to be in Chicago.   Xilinx, Actel, and others offer their IP via a third party arrangement.  There also are ADC in FPGA app-notes by Lattice, and Altera.

Max The Magnificent
User Rank
Blogger
Who, what, when, how?
Max The Magnificent   12/4/2013 1:36:00 PM
NO RATINGS
There was a company who was selling IP to do this sort of thing in FPGAs -- using an LVDS input pair to drive a soft core implemented in programmable digital fabric to implement an analog to digital converter. One of the advantages they talked about was using such a part in space -- if you already had a space-qualified digital FPGA -- it was quicker / cheaper / less risky to implement an ADC in the FPGA's digital fabric than to space-qualify an analog part.

Do you recall the name of that company?

Radio
LATEST ARCHIVED BROADCAST
EE Times Senior Technical Editor Martin Rowe will interview EMC engineer Kenneth Wyatt.
Top Comments of the Week
Like Us on Facebook

Datasheets.com Parts Search

185 million searchable parts
(please enter a part number or hit search to begin)
EE Times on Twitter
EE Times Twitter Feed
Flash Poll