PCM at IEDM 2013: Problems Aired.
There are about half a dozen papers on phase change memory (PCM) devices at IEDM 2013, and most deal with known reliability problems associated with PCM. Of course, it might have served the PCM community better if those subjects (instead of the PCM hype) had been more openly discussed much earlier than 2013. While I am sure the work will be of the highest quality, for this author, the words, stable door, bolted, and horse gone do come more quickly mind. Much will depend on Micron's pending decision on their future involvement and plans for PCM that I will discuss towards the end of this piece.
IEDM 2013 paper 21.5, from authors at CEA LETI MINATEC Campus and University of Pavia, adds the relatively new problem of set stability at elevated temperature to the well-discussed problem of PCM elevated temperature data retention. Until now, the fully crystallized SET (that is the low resistance logic state) of a PCM has not been considered a serious problem alongside all the other long list of problems that have beset PCM. It becomes a problem worthy of attention when there is a need to reduce the SET time, or pulse width, as it appears will be necessary if PCM is ever to find applications in the area of industrial control and as an embedded memory.
Figure 1 is a summary of PCM operation and can be used as an aid to explain one reason why any attempt at reducing set times results in elevated temperature instabilities. The red lines in Figure 1 illustrate two from many possible examples of the SET/RESET operation of a PCM memory cell. In one case, the cell is being driven between its fully amorphous and crystalline states. In the second example (the shorter of the two red lines), the two logic states of the memory are represented by different volume fractions of crystallites in an amorphous matrix.
Clearly, if only a smaller volume fraction of conducting crystallites are allowed to form, then the time taken to achieve that state, the SET time, will be reduced. From the viewpoint of stability, this has introduced the problem of elevated temperature data retention to the SET state, meaning that the crystallites exist as nucleating sites in an amorphous matrix and any growth will reflect in resistance changes with time. What the authors of paper 21.5 are claiming is that by using a combination of physical/chemical analysis and programming the current versus time profile, they have solved the stability problems associated with attempts to reduce SET times. It will be interesting to see if the time variable is within a given read/write pulse or within the write/erase lifetime of a memory cell.
Figure 1: A summary of PCM operation.
Paper 22.1 at IEDM2013, from authors at Politecnico di Milano, STMicroelectronics, will also address the problem of stability of the SET state and attribute observed changes to “grain-boundary relaxation and grain growth.” Referring again to Figure 1, this would be in consideration of the effects occurring in the blue colored crystallized regions. (It could also cover the case discussed in relation to paper 22.1 where the material is not fully crystallized and the crystallites exist in an amorphous matrix.) In Figure 1, the very dark blue region is included to deal with the fact that in many PCM matrices, the crystallized active material forms part of the array electrode structure or exists in the form of un-switched material electrically in series with the active region (i.e., high aspect ratio memory cells).
In that latter case, the drift will occur over the lifetime of the array, whereas for the active region, it will restart after every switching event. The authors state they will present a unified model capable of predicting the reliability of the SET/RESET states with elevated temperature. Again, it is to be hoped that they will include the considerations of write/erase lifetime and the effects of element separation and composition changes.
IEDM Paper 22.3, from authors at Micron Technology, Inc and the Politecnico of Milandoes, examines the problem of element separation. It will explore the forces that cause that problem, including diffusion, concentration gradient, and electric field (that are fundamental to the operation of a PCM and its failure mechanisms). The authors state they will describe a model that accounts for the effect of temperature gradient and phase segregation and unifies electro-thermal-phase change effects, providing what they describe as a unified framework for the self-consistent simulation of both the electro-thermal and the phase change material problems. The authors have applied their model to the study of different types of PCM cells, showing good agreement with experimental data and demonstrating in particular the fundamental role played by the temperature profile.
IEDM paper 22.6 is by authors from Università di Bologna, Università di Modena e Reggio Emilia, and the University of Illinois at Urbana-Champaign. It will link threshold switching and memory effects to heat and charge transfer effects using a random 3D network model. They will provide evidence that their model accurately describes experimental voltage-current characteristics. They plan to report what is described as a “sudden crystallization voltage snap-back” effect. It appears from simulations that they are able to identify the conditions that lead to electronic threshold switching as a distinctly separate effect from the holy grail of electro-crystallization. Until now, it has been considered that the mixed thermal-electronic effects of threshold switching lead to the thermal conditions and temperatures required for crystallization, so it will be interesting to see how these authors interpret what they describe as “current induced crystallization.”
IEDM 2013 paper 21.7 from authors at Politecnico di Milano and IU.NET, Università degli Studi di Milano-Biocca and Micron, will explore the crystallization statistics in their 1 Gb PCM arrays. The reason for the study is apparently because of “erratic retention due to crystallization variability.” The authors say they have developed a means of stabilizing the data retention by tuning the programming conditions. A new retention model will be offered that it is claimed will be able to predict cell-to-cell and cycle-to-cycle variability as a function of programming conditions.
As stated earlier, much of the applicability of the work on PCM to be covered at IEDM 2013 and described in the preceding paragraphs will depend on the outcome of Micron's decision on their future plans for PCM. The removal of their 1-Gb PCM-MCP as a product from the Micron web site might be considered a clue that a part of the decision has already been made. The paper 21.7 at IEDM 2013 with the words “erratic retention” for the 1 G bit PCM array may be another clue, and is certainly not helpful to the PCM cause.
The 16 G-bit resistive ReRAM paper that Micron will present at ISSCC 2014 in February might be an even bigger clue. At this time it is not clear if the new ReRAM device is monolithic or MCP or CUBE or what is the active material used -- HfO or SrTMoxide are best guesses -- but in bit capacity it has jumped Micron's PCM monolithic capability. If it can be quickly announced as serious product, then there would not appear to be much point in Micron staying with PCM.
— Ron Neale is an independent electrical/electronic manufacturing professional and a contributor to EETimes.
IEDM technical program