As usual, IEDM 2013 provided a shop window for researchers at universities and industry laboratories to present the results of work at the very leading edge of solid-state electronic devices of all types. Following my preview covering phase change memory at this year’s conference, this report will now look at the work on resistive random access memory (ReRAM or RRAM). Papers at IEDM 2013 indicate there is still a list of problems that must be solved before the leading edge becomes commercial product reality, but good progress is being made.
If any new technology is to replace flash as the non-volatile (NV) memory of choice, then the major claim of the past that flash will not scale will now require wannabes to provide evidence that the new technology they are proposing will be operable at device dimensions in the range 10 to 15 nm, supported by reduction to practice demonstrations at 20nm in arrays of greater than 100Mbits. Other essential new requirements in order to challenge flash are also clearly identifiable. For instance, it needs to have three-dimensional (3D) array stacking with 8 to 32+ Gbit array potential. Some form of non-linear asymmetrical electrical characteristics will be required (either as an integral part of the memory mechanism or very close coupled to the active part of the memory material in order to serve as the “sneak path” matrix isolation device). If any initial forming step to create the filament is required, it must be indistinguishable from normal operation.
In addition, the new technology must have these well-identified characteristics: elevated temperature data retention of greater than 10 years and operation at >100 C, write/erase endurance greater than 10E9 cycles, low power, short write/erase time, and low voltage operation (the latter equal to or less than 3V). While monolithic integration and process compatibly with silicon an essential.
The present state of play means that unless the new memory development originates from one of the major R&D labs associated with one of the major semiconductor memory manufacturers it will face significant adoption problems. While simulation and a clear understanding of the mechanism will be essential, the reduction to practice at the dimensions now required is an important consideration. Techniques like atomic layer deposition (ALD) and sub-20nm lithography are expensive. For the entrepreneur, the way forward is perhaps setting up a small company to provide initial feasibility demonstrations or very high quality simulations then license the technology.
While I will concentrate on NV resistive memory, in a competitive sense it is necessary to acknowledge that other memory technologies, such as magnetic (MRAM) and ferroelectric (FeRAM) memory continue to make steady progress.
As far as active materials are concerned, metal oxides are still the main players. Using the count of papers at IEDM 2013 as a reference, it would appear that HfOx -- Hafnium oxide or hafnia -- is receiving much attention from researchers. (This is closely followed by titanium and tantalum oxide, which offer the best route to the integrated rectifying or non-linear matrix isolation device. I will explore those in my next IEDM 2013 report.) The strong presence of papers from IMEC, Belgium, is noteworthy.
Addressing the Hafnia RRAM problems
Paper 10.1 from authors at IMEC, sponsored in part by Toshiba, focused on the problem of poor data retention of HfO2 /Hf 1T1R memory cells and finding a means of improving it. They identified the mobile oxygen diffusion from an oxygen scavenging layer as the main effect that controlled retention degradation. The solution was to limit the oxygen diffusion with the addition of annealing applied after RRAM cell formation, which they claim “greatly” improved data retention.
A model of RRAM endurance degradation mechanism was the subject of IMEC paper 22.5 from authors at Peking University, IME*ASTAR. This was an extension of previous modeling work and provides an analytic model of endurance degradation as an addition to RRAM transient operation. The endurance degradation behavior the model predicted was verified using published experimental data from different devices and methods of operation. In the direction of higher bit density, a scheme for multi-level cell (MLC) data storage was offered, and based on the model, a prediction of 106 switching cycle for all of the 4-level resistance states in HfOx RRAM appears achievable. The authors also offered an innovative dynamic self-recovery operation scheme that combined high speed and robust endurance switching for the first time.
Paper 21.1, from authors at IMEC and the Catholic University, Leuven, (KUL), explored the problem of OFF state reliability as a function of the statistical variability of the memory filament configuration of HfOx based RRAMs using multi-layer and Al-doped films and the effects of forming compliance and dielectric micro structure. At the root of the problem are the stochastic processes involving the generation-recombination and drift-diffusion of multiple oxygen ions and vacancies during both the set and reset operation (which determine the shape of the filament at the microscopic level). Looking ahead, the authors explored operational, material, and process design options that might help enhance reliability, such as by increasing the value of V(Db), the disturb voltage for the OFF state. Data was provided with respect to the typical resistance level at which the HfOx filament undergoes “rupture.” These ultra-thin film devices start to point us towards memory devices of the future where nano-dimensions will bring quantum effects into play. For their devices, the authors of this paper identified that for the OFF state filament the structural configuration was bimodal. With a finite non-zero probability the the I-V characteristics will be dominated by the effects of either the quantum point contact (QPC) mode or tunnel barrier (TUN) modes.
The important need to link the physical and electrical properties of Hafnia-based RRAMs was again highlighted in paper 22.2 by authors from SEMATECH, University of Albany, and Universita di Modena e Reggio Emilia. The authors made the strong and well-supported case that connections between electrical measurements and physical properties can be established only by employing simulations. These simulations must involve the complex variables of HfO RRAMs, in particular relative oxygen affinities, valence states of ions and vacancies, ion diffusivity, and dielectric crystallinity. Building on earlier physical modeling work, the authors developed a simulation model. They claim that for the first time, this model provides a consistent explanation for all reported critical RRAM features including the role of oxygen deficiency for repeatable switching, relation between switching characteristics, and dielectric morphology. One of the key results from the simulation is it points to the advantage of creating oxygen deficiency by the use of an oxygen getter either during or post processing and fabrication.
The modeling in paper 22.2 was complex. In brief, the device space is divided into a 3D matrix of unit volumes characterized by a resistance value. Each value is determined by the local stoichiometry at any given (simulation) moment. A statistical Monte-Carlo method has been developed, which accounts for the local power dissipation, temperature-increase-with-current, and for the temperature/E-field-driven vacancy-ion pairs generation/recombination and oxygen ion diffusion at every position in the 3D volume. The derived 3D potential and temperature maps are then used to re-calculate vacancy/ion generation/diffusion rates. The RRAM devices simulated studied consisted of TiN/Ti/5nm HfO2/TiN stacks with a cell size 20x20nm. Numerical values of all the material parameters used in the simulations were obtained from the published reports. The model successfully reproduces, without the use of any fitting parameters, the observed low and high resistance state trends with respect to dielectric stoichiometry, forming voltage, and amplitude and duration of the reset pulse. It will be interesting to see if the model always fixes the filament at the same location when compared with actual devices. The result might provide a clue as to whether or not defects are the key drivers that determine filament location.
For Hafnia-based RRAM, the list of problems getting the attention of researchers and developers include: poor data retention, endurance degradation, off-state reliability, voltage disturb rupture of the off state, and forming. Together, they are building the necessary and detailed database that might allow resistive memory to eventually move into production as a commercial product. Post IEDM 2013, this writer's view is the timing for any of the wannabe resistive-RAMs to reach a position to challenge flash as the memory of choice as a commercial and performance competitive product is still some long way ahead in time with much more effort required.
The referenced numbers are to the session and the paper number, and can be found in the proceedings.
Article revised 12/18/13.