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Doing Math in FPGAs, Part 3 (Floating-Point)

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Max The Magnificent
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Signed magnitude
Max The Magnificent   1/7/2014 4:24:53 PM
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Hi Tomii -- as you point out, the sign-bit in the IEEE 754 is just 0 = positive, 1 = negative; that is, the combination of the sign bit and the mantissa is a sign-magnitude vale as opposed to being a two's complement value. One problem with thsi is that you can have both +0 and -0 values. Have you any idea why they chose to do things this way?

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