Apple moved to a 10 metal, 32nm HKMG process when it launched the A5 processor in March 2011. The gate-first transistors featured a 130nm contacted gate pitch, with a SiGe channel for the PMOS transistors, and separate work function metals for the NMOS and PMOS transistors. The SiGe channel improves the PMOS hole mobility and serves as part of the transistor work function engineering. The A6 processor, launched in September 2012, was also built with the Samsung 32nm HKMG process.
The A7 is Apple’s first 28nm device. The process technology is broadly similar to that used at 32nm, with an ~10% shrink of the contacted gate pitch to 120nm. The PMOS and NMOS transistors are easily distinguished due to marked differences in the transistor structure.
The NMOS transistors feature an NMOS work function metal gate (MG) deposited onto the high-k (HK) gate dielectric, which is composed of hafnium oxide deposited over a thin layer of silicon dioxide. The process is described as gate-first since the silicided polysilicon gate is deposited after the HKMG gate stack has been formed.
A transmission electron microscope (TEM) image of Apple A7 28nm NMOS transistors. (Source: Chipworks)