A new approach aims to be a contender for next-generation memory. Here's how it works.
At present (and in the recent past), many types of memory devices and materials have been advanced in the quest to provide a nonvolatile memory that will scale lithographically and eventually outperform and replace flash memory (today's silicon-based NV memory workhorse) and unify the rest of the semiconductor memory device spectrum.
New to the scene is correlated electron random access memory (CeRAM). Proponents say it offers a number of attractive characteristics: thin film, fast bulk switching, no need for forming, stability over a wide temperature range, low-power and low-voltage operation, and scalability. All these would appear to make it a worthy candidate as a next-generation memory. CeRAM is the product of work by a team at the University of Colorado, Colorado Springs, under the direction of Dr. Carlos Paz de Araujo. They are responsible for the material research and development of this new type of memory, and they have verified its principles of operation and feasibility.
In 1986, Paz de Araujo and Dr. Larry D. McMillan founded the privately held Symetrix Corp. to conduct advanced research and development in the global semiconductor chip industry. Symetrix recently announced that CeRAM has clearly attracted the attention of ARM and a number of other important companies. On Feb. 4, Symetrix announced:
ARM is evaluating CeRAM technology as part of its strategy in embedded nonvolatile memory offerings and their discussions with Symetrix started over three months ago. Symetrix will provide its technology and the results from Symetrix programs ongoing at the University of Texas (Dallas) and the University of Colorado (Colorado Springs) to chip foundries engaged by ARM. Other chip companies are also working with Symetrix under similar terms.
What is CeRAM?
CeRAM is based on a transition metal oxide, in this case nickel oxide (NiO). The premise is that, by cleaning up NiO through a suitable doping technique, it is possible to obtain electrically conducting NiO that can make very rapid, reversible, nonvolatile bulk transitions between its electrically insulating and conducting states. In the past, these transitions were possible only at a high pressure and temperature, but they now can be achieved at room temperature with low switching voltages and currents. Key to the operation is a reversible metal-to-insulator transition (MIT) that has its roots in the work of Sir Nevill Mott and John Hubbard.
Interpreting the mechanism responsible for the observed electrical memory characteristics requires casting off many of the fundamentals that underpin the silicon-based solid state electronics industry. In the name of the new memory, "correlated" is the single word that describes the difference between this new type of solid state electronics and conventional single-crystal silicon-based electronics. In the latter, electrons are considered uncorrelated. (In simple terms, the difference is about the interaction of electrons with one another, which requires casting off the reliance on carrier transport considerations based on structural periodicity.) Proponents of the new memory say that, though an understanding of conventional electronics relies on a rigid density of states, meaning the act of doping does not affect the density of states of the solvent (i.e., silicon in today's electronics), for the CeRAM, the density of states is not rigid. Instead, its manipulation is key to the two resistance states that are the basis of this new approach.
One unique feature of CeRAM operation is its single-site oxidation and reduction (meaning the loss and gain of an electron). For the active material of the CeRAM, the oxidation and reduction occurs at the same nickel-ion site by means of quantum tunneling effects. From that point forward, the explanation of what is happening gets extremely complex and relies on effects that will not be familiar ground to those used to dealing with single-crystal electronics.
CeRAM: A two-terminal view
It will be essential for potential users of the CeRAM memory to understand the electrical characteristics, specifically current as a function of voltage. See the I-V curve illustrated in Figure 1.
An I-V curve showing electrical characteristics for CeRAM memory.
Here's an example of a CeRAM reset/set cycle. Starting with the device in its as-born conducting state, the initial part of the green set-state characteristics is marked in blue to indicate a voltage excursion that would represent a typical read access. If the voltage is increased following the green curve, at about 0.8 V, the characteristic makes a rapid transition to a high-resistance insulating state.
In the insulating state (the red curve in Figure 1), from the transition voltage (0.8 V) the current can be reduced toward zero and read cycles can be carried out (indicated by the blue overlay between 0 V and 0.2 V in Figure 1), or the voltage can be increased along the red part of the characteristic. In that direction, at about 1.6 V, the current starts to show a much greater increase with increasing voltage to a value where a rapid transition back to the conducting state occurs.
To avoid high levels of damaging current, it is necessary to limit the current to a compliance level (icomp). In the metallic state, the rapid fall in resistance causes the voltage across the device to fall to a value determined by icomp and the metallic state resistance. When the SET pulse is terminated, the voltage across the device will drop to zero, and the device will be in its SET state.
It is worth noting that access along the green curve for another reset cycle is possible only after the voltage across the device has returned to zero (to allow the transient electrons in a non-equilibrium situation to relax). In normal operation, this will occur because switching the device between its set and reset states will use pulses. Proponents say this return-to-reset requirement does not impose latency on the minimum SET and RESET time (due to the speed of phase transition).
(a) Plot of CeRAM switching characteristics on log scale.
(b) Linear scan
of CeRAM I-V characteristics.
(Source: Chris McWilliams)
Figure 2 shows actual CeRAM switching characteristic for real devices taken from the recently published thesis of Chris McWilliams at University of Colorado. Figure 2(a) is a plot of log current as a function of voltage, while Figure 2(b) is a direct plot from the measuring system. The characteristics are symmetrical and identical in the first and third I-V quadrants.