Don't confuse surge protection with ESD protection when specifying circuit protection. ESD occurs much faster.
It's a familiar scene. I'm at my desk –- coffee cup in hand –- when the phone rings. I always know that on the other end of that call must be an engineer from the breadboarding era (the Twitter generation never calls on the phone). Being in the circuit protection business, I know the caller wants to know how to prevent circuit damage.
I can just envision the caller sitting at his desk with a pile of data books hidden under a smattering of Smith charts. Don't get me wrong -– I love data books, and I have a respectable collection of my own.
The engineer introduces himself. With what seems to be the slightest hint of panic in his voice, he says he needs transient voltage protection for a differential-pair interface. I ask some initial questions about his application. He replies, and then he tells me that, above all else, the protection part that he uses needs to clamp at X volts, which is, is very specific and very low voltage.
"Really?" I respond. I'm somewhat surprised that an engineer actually knows this clamping voltage to such a specific value. Customers generally don't know the clamping voltage needed to safeguard their data interfaces, nor would I expect them to know it. I don't know this value without taking the product into the lab and hitting the specific interface with a barrage of tests that mimic transient threats. Still, I'm intrigued by the fact that he knows his needed clamping voltage to within two significant digits. That's the first tipoff that I may not have all the information and/or understand his dilemma.
"Are you protecting this interface from a surge threat or a fast rise-time transient such as ESD or EFT?" I ask. "ESD only," he replies. OK, now we are getting somewhere. I continue, "Does X refer to the clamping voltage expected at the first peak of the ESD pulse? You know, the spike at 1 ns? Or are you talking about the midpoint of the ESD threat, 30 ns?" After we talk further, it becomes clear that his clamping number X came about from referencing a competitor’s datasheet (something not all that uncommon). Alas, he's confusing the surge clamping with what he really needs –- a low ESD clamping transient-voltage suppression (TVS) diode.
The conversation continues, and I suggest a few low-clamping voltage TVS devices. When he asks about the clamping voltage, I say something that I know will make him jump out of his skin. "The first peak of this TVS device should clamp at roughly 70 V."
"Seventy volts!" he shouts. "I could never take 70 V. That's way too high." I try to respond gently, "You're right. The ESD event is a very high-current/high-voltage threat. And your interface probably cannot take a 70 V strike for a microsecond waveform (surge). In this case, we want to protect your interface from ESD. ESD lives in the nanosecond world. For the first peak of ESD (500 ps to 1 ns), I think that your IC very well might sustain 70 V. I agree, 70 V is probably unacceptable if it presented as a long-duration surge."
To Page 2: The ESD spike