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TSMC Details Family of Chip Stacks

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sranje
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Congratulations to Herb
sranje   4/24/2014 2:21:31 PM
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An excellent summary - measured, balanced, informative -- a pleasure to read your articles Herb

sung kyu lim @ GTCAD
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typo?
sung kyu lim @ GTCAD   4/24/2014 2:44:43 PM
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40nm pitch for TSV? you mean 40um?

HBR1
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Re: typo?
HBR1   4/24/2014 3:03:49 PM
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Hi Sung Kyu, you are right - it should say MICROmeter. This was wishful thinking on my part. Can YOU take on this challenge and make my wish come true ?....Herb

sung kyu lim @ GTCAD
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Re: typo?
sung kyu lim @ GTCAD   4/24/2014 3:31:07 PM
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oh well, i wish i could, but i am just a humble designer dying to reduce TSV area overhead in my 3D IC designs... i am eargerly waiting for TSMC to produce smaller TSVs at lower cost ;-)

chipmonk0
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" ... details .. " Oh really ?
chipmonk0   4/25/2014 11:26:49 AM
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One usually expects more details in an article titled " ... details .. " ! For a start how about figures / photos showing various 3-d stacks mentioned as a proof of existence but also some dimensions / performance / yield data. Otherwise its more of the same old hype that has dogged the reporting of 3-d stack technology development.

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