NVM characterization basics
Electrical characterization of floating-gate flash memory was traditionally performed using DC instruments, such as source measure unit (SMU) instruments, after pulse generators had programmed and/or erased the memory cell. This required some type of switch to apply the DC or pulse signal alternately to the test device. Occasionally, oscilloscopes were used to verify pulse fidelity (pulse width, overshoot, pulse voltage level, rise time, and fall time) at the device under test (DUT). Measuring the pulse is important because the flash memory state is quite sensitive to the pulse voltage level.
However, the use of oscilloscopes was relatively rare, even in research, because the required setup for oscilloscope measurements differed from that for the pulse-source/DC-measure approach. Even when scopes were used for flash characterization, the complexity of measuring the transient current meant that voltage was the only measurement taken while pulsing. The transition to smaller geometries and multi-bit cells has increased the need for more precise pulse source and measurement for floating-gate flash development.
In addition to accurate pulse levels, characterizing the newest NVM technologies requires the ability to produce complex, easily adjustable waveforms, not just a single standard square pulse. For example, testing ReRAM devices often requires pulse sweep up/sweep down profiles while simultaneously measuring the current. This memory technology requires the ability to output multi-pulse waveforms consisting of arbitrary segments, together with multiple measurements within each waveform. Endurance testing requires the ability to output complex arbitrary waveforms quickly without the need for additional setup time or overhead.
Current compliance or current control is also important for ReRAM characterization. Usually, this is done using DC instruments and is sometimes implemented in custom pulse setups. It is not clear if the current compliance in DC instrumentation is providing sufficiently fast control of the current to meet the typical requirements. For pulsing current control, it is desirable to install the current control device as close to the test device as possible to avoid the possibility of current discharging from the interconnect capacitance into the test device.
Channel synchronization is necessary for NVM testing that requires multiple pulse source and measure channels. Two channels are sufficient for ReRAM characterization, to force and measure on both sides of two-terminal devices. Traditional pulse instruments are difficult to synchronize because there are a variety of trigger synchronization methods, each of which has different complexity/trigger performance tradeoffs associated with it. Modern pulse I-V instruments offer internal trigger routing and automatic synchronization, in addition to the integrated measurement capability.
NVM characterization instruments
The latest NVM test instrumentation is designed to allow measuring current and voltage simultaneously, with a single instrument, while applying pulses to a memory device or material. For example, the model 4225-PMU ultra-fast I-V module and the model 4225-RPM remote amplifier/switch are two instrument options designed for use with Keithley’s model 4200-SCS parameter analyzer. This combination (Figure 1) has integrated simultaneous measurement of current and voltage on each channel, simplifying the investigation of transient pulse responses. The system’s multi-pulse waveform generation capability is useful for characterizing the memory device’s switching mechanism in both the transient and I-V domains, using DC-like extractions from the tops of pulses or plotting the oscilloscope-like measurements taken during pulse transitions. The multi-pulse capability allows for control over each segment of the waveform, allowing for precise control of each transition for a single pulse or for hundreds of pulses in a single waveform.
Model 4225-PMU ultra-fast I-V module and two model 4225-RPM remote amplifier/switch modules.
This system can be expanded from two to twelve channels of synchronized pulse I V capability. As a result, as the material development using two-terminal test structures makes the transition into multi-terminal structures, it’s possible to add more channels to allow for a pulse-per-pin test approach, or for testing multiple devices simultaneously to gather the quantities of data necessary for statistical analysis as a part of modern product and process development.
ReRAM is a type of Redox (reduction-oxidation) memory. (See articles here and here.) The nomenclature for switching between memory states in ReRAM is SET and RESET. For bipolar ReRAM, the SET operation applies a positive voltage to put the memory cell in a low-resistance conductive state. The RESET operation applies a negative voltage to switch the cell from the low-resistance state to a high-resistance state. It is typically tested in the DC realm using SMU instruments.
The process for creation of filaments within the ReRAM material is called “forming” and is considered the most important aspect in determining the ReRAM switching behavior and cell performance. In traditional ReRAM test setups, to create (or form) the low resistance state initially, SMU instrument current compliance is used to limit the maximum current flowing through the test device during the forming operation. The desire is to limit the amount of current to reduce the stress on the cell and to improve the quality of the switching process. This situation results in a better memory cell.
However, the compliance circuit in an SMU instrument is not instantaneous, and takes microseconds to milliseconds to engage fully. Before the circuit is active, the amount of current flowing is not fully known or controlled. The actual transient response of the current compliance and the detailed interplay between the changing test device impedance and the reaction of the SMU instrument is complicated and not well understood.
Pulse I-V characterization improves the situation by providing strict timing control of the voltage signal applied to the test device. The NVM_Examples project included in the model 4200-SCS’s software includes a section of tests (Figure 2) designed for characterizing 1R ReRAM memory devices, which are two-terminal devices with a “low” and “high” side. Rather than a DC signal, a voltage pulse is applied across the oxide, which creates conductive filament(s). As mentioned previously, forming is usually performed with a DC voltage sweep with current limit enabled.
ReRAM device tests.