This article by Peter J. Hulbert addresses issues related to characterization and forming, as well as endurance testing for 1R ReRAM structures.
In part 1 of this article, I explored the basics of resistive random access memory (ReRAM) structures, as well as the test hardware available to characterize them. Now, I will address issues related to characterization and forming, as well as endurance testing for 1R ReRAM structures.
In Part 1, I noted that the forming process of a ReRAM cell is the most important part of the characterization because the forming process creates the switching characteristic in the cell, which determines almost all critical memory performance metrics. ReRAM forming results are shown in Figure 6a (voltage and current transients -- V and I vs. time) and 6b (the same data plotted as current vs. voltage with arrows added to show the time progression of the curve, to simplify comparison with the time-based Figure 6a).
ReRAM forming results expressed as V and I vs. time.
ReRAM forming results expressed as I vs. V. The arrows indicate the time progression of the curve.
Current exponentially grows as voltage reaches a certain value. When the filament is established, the device switches into low resistance state, and the current limit prevents further growth of the filament. In these examples, forming was performed using a Keithley Model 4225-PMU Ultra-Fast I-V Module and two Model 4225-RPM Remote Amplifier/Switch Modules with current limit enabled. Typically, ReRAM researchers use DC instruments (source measure units, or SMUs) with current compliance for forming. When forming is done using a PMU/RPM, it's possible to measure current and power transients during the forming process. However, when it is done with an SMU instrument, the details of the process are completely hidden. (The technical literature on this topic indicates the forming process is controlled mostly by the value of the current limit and the speed of its activation.)
The same test routine used for Characterization and Forming was applied to an already formed device to collect the “butterfly” curve shown in Figure 7a and 7b. Figure 7a shows the current and voltage transient (I and V vs. time); Figure 7b illustrates the current vs. voltage in the shape of butterfly wings. The same routine, reramSweep, with different test conditions, can obtain both DC (SMU) data and pulse (PMU) data. This allows for switching between DC and pulse modes of ReRAM characterization.
Applied voltage (blue curve) and test device current response (red curve) vs. time (x axis) for the butterfly test.
Butterfly curve, plotted current (y-axis) vs. voltage (x-axis).
The numbered circles in Figures 7a and 7b show the relationship between the applied voltage segments (blue curve in Figure 7a) to the appropriate portion of the device response (Figure 7b). The left wing of the butterfly curve is a RESET transition, when the resistance switches from a low resistive state to a high resistive state. Note that the current limit is not enabled. Voltage polarity is opposite to the polarity used for Forming and SET. During the RESET process, it is commonly assumed that the conductive filament loses continuity from one electrode to another one, but this affects a small section of the filament. The SET process is very similar to the Forming process, in that it uses pulses of the same polarity to re-establish continuity of the conductive filament from one electrode to another one. However, because the SET bias does not have to grow the whole filament, just reestablish the connection, less bias is required than in the Forming process. The SET procedure, similar to Forming, requires the use of the current-limit capability but at a lower current level. Selection of the test parameters for ReRAM testing, including Forming, SET, and RESET, follows a logical progression for initial forming and characterization.
Step No. 1: First, prior to any forming, the test device is verified to be good and that it demonstrates a non-linear I-V dependency (see http://www.eetimes.com/author.asp?section_id=36&doc_id=1323023&). During this initial pre-screening, care should be taken to use a voltage lower than the forming, SET, and RESET voltages.
Step No. 2: Forming is a critical process (Figure 6a and 6b). The value of the maximum bias should be selected to trigger filament growth. At the same time, the current limit should be small enough, thereby preventing the filament from becoming too stable. If a conductive filament is too stable, no amount of the RESET bias will disconnect the filament, and no sufficient electrical field in the filament can be achieved. The value of the voltage bias for the RESET pulse should be just enough to break the filament.
Step No. 3: Current limit for the SET bias, similar to Forming, should be just large enough to reconnect the filament, but not so large as to prevent a “disconnect” in the next SET/RESET cycle. Selecting the Forming/SET and RESET parameters is somewhat tricky, requires sufficient investigation, and in a critical way controls the endurance of the ReRAM device. The endurance is defined as the maximum number of SET/RESET cycles, where the LOW and HIGH resistance states are sufficiently different.