At least four microserver projects are brewing in European labs, testing out a variety of processor, system, and software architectures, one researcher reports.
A handful of major microserver projects, mainly funded by the European Union, presented data center servers based on energy-efficient embedded processors at the recent HiPEAC EU Network of Excellence event.
The NanoStreams project brings together European expertise in embedded systems design and high-performance computing (HPC) software to address the challenge of real-time analytics on fast data streams. NanoStreams uses an architecture and software stack that address the unique challenges of hybrid transactional-analytical workloads, encountered by emerging applications of real-time big-data analytics.
The NanoStreams processor is an amalgam of RISC cores and nano-cores, a new class of programmable, custom accelerators. Novel automatic compiler generation and parameterisation technology enables low-effort programming and integration of nano-cores into application-specific, many-core accelerators.
The project’s proposed heterogeneous Analytics-on-Chip processor forms the backbone of the NanoStreams microserver. The system also leverages a hybrid DRAM-PCRAM memory system and a non-cache-coherent, scale-out architecture to achieve extreme energy-efficiency. It systems uses a mix of Calxeda SoC and Xilinx Zinq boards.
NanoStreams brings together a consortium of two academic institutions and three technology providers working in partnership with IBM and Credit Suisse. The main advantage of Nanostreams is that it is driven by the needs of real financial workloads and the proposed architecture is evaluated using real stock-exchange data.
In his talk on the project, Dimitrios Nikolopoulos, a professor and research director at Queen’s University of Belfast, compared commodity x86 servers and microservers based on the Boston Viridis platform. He emphasized the need for fair comparisons of power consumption not only between the processors but between whole systems including the power supplies, storage and memory subsystems.
The Euroserver uses a processor on a 2.5-D chip stack with an interposer.
The Euroserver project applies state-of-the-art low-power ARM processors in a new server architecture that uses 3D "chiplets." The approach aims to reduce the acquisition cost of the system and scale the numbers of cores, memory capacity and I/O bandwidth it provides. New systems software supports both legacy and advanced features including system-wide virtualization to further reduce energy consumption.
The project takes a novel software approach of managing server resources as multiple coherent islands. It isolates and protects the multiple workloads from each other when they use shared server resources such as I/O, storage, memory, and interconnects. The main advantage of the architecture is it gives the user the option to move tasks and processes close to data instead of moving data around.
The Euroserver consortium includes ARM, STMicroelectronics, Eurotech, and OnApp, in addition to five academic institutions including CEA and FORTH.
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