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Understanding Peak Floating-Point Performance Calculations

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Garcia-Lasheras
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Re: Who would have thunk?
Garcia-Lasheras   10/20/2014 6:15:14 PM
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@Max: "I woudl love to see this if you do it."

You know you'll be one of the first to be informed about this if I managed to do that ;-)

Clive
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Re: Who would have thunk?
Clive "Max" Maxfield   10/20/2014 6:12:06 PM
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@Garcia: I was planning to build this system by using the fixed-point arithmetics DSP slices already present in FPGA... but the Altera announcement about true Hard-FP supposes a huge inflection point!

I woudl love to see this if you do it.

Garcia-Lasheras
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Re: Who would have thunk?
Garcia-Lasheras   10/20/2014 5:38:16 PM
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A QFT (Quantum Field Theory) model simulation implemented in hardware. I mean, not a custom hardware accelerator for a software algorithm, but a pure HW representation of the QFT equations.

You can imagine the space-time mattress and existing Quantum Fields as a set of discrete data points (registers) interconnected with their neighbours by extremely simple logic+math structures (data-paths). Indeed, this "hardware lattice" point of view is as real as the pure mathematical one: the model predicts the same outcomes.

I was planning to build this system by using the fixed-point arithmetics DSP slices already present in FPGA... but the Altera announcement about true Hard-FP supposes a huge inflection point!

 

Max The Magnificent
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Re: Who would have thunk?
Max The Magnificent   10/20/2014 5:26:09 PM
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@Garcia: I've been planning a cool experiment since the first time I heard about Altera devices boasting hard floating point DSP slices... too cool!

What experiment?

Garcia-Lasheras
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Re: Who would have thunk?
Garcia-Lasheras   10/20/2014 5:22:10 PM
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I cannot wait, I NEED to give a test drive to one of those "big boys" ;-)

Indeed, I've been planning a cool experiment since the first time I heard about Altera devices boasting hard floating point DSP slices... too cool!

Clive
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Who would have thunk?
Clive "Max" Maxfield   10/20/2014 4:35:12 PM
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I remember when the first FPGAs hit the street in 1985 -- containing little more than an 8 x 8 array of lookup tables. Who would have thunk that one day these little scamps would be boasting myriad hard floating-point DSP cores?

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