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Understanding Design Capacity in Hardware Emulators

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Single Socket FPGA and Xeon for Emulators
Home0303   7/2/2015 4:26:32 PM
Ciao Rizzatti-

Intel recently announced XEON E5 Processor with a big FPGA in a single package.


What is your opinion about developing an Emulator with  such a solution. Is it possible to combine the best of both worlds (processors + FPGA) in a single Emulator ?



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Compilation Time
Rizzatti   1/12/2015 4:45:40 PM

DBSingh, in principle I like disruptions as you do. Whether Tabula's FPGA offers a viable building block for a low cost emulator or not it seems to me a bit premature to make a call. I will keep an eye on it.

Sanjib and Tobias, my article focused on capacity of emulators, mentioning compilation time as a side effect. I did not touch performance (speed of emulation) nor cost. Let me address those in future articles.

Regarding compilation, the process evolves through multiple stages, including synthesis, partitioning, and, for the FPGA-based machines, place&route. It should be noted that all three stages can be parallelized on farms of PCs, dramatically accelerating the overall compilation time.

As for total compilation time, assuming the FPGA-based emulators have access to a large farm of PCs, a 100 million gate design may compile in less than two hours on the processor-based emulator, about three hours on the custom-FPGA-based emulator, and 15 to 20 hours on the commercial FPGA-based emulator.

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Re: How does Tabula's DesignInsight affect things?
DBSingh180   1/11/2015 10:43:24 AM
Hi Lauro,

I agree with Max, that the announcement by Tabula is a big one.

Both for prototyping and Emulation. The capability to view all nets and possibility ofmodifying design behavior by forcing nets is huge.

Although the readback feature from Xilinx can be used to reconstruct the design behavior for similar effect, but does make running design slower, which is an advantage with Tabula.  

This definitely is exciting as it open gates for smaller players to develop innovative and fast emulation solutions and would threaten the Big "3" sitting pretty with their emulation solutions.

I personally like disruptions in techonolgy as they are signs of new begining and exciting tomorrow.



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Cost of the hardware vs cost of development
Sanjib.A   1/10/2015 12:45:45 PM

@Lauro: The information about the comparison of cost of these hardware emulator platforms would also be useful. I assume, the cost of the custom-FPGA based emulator platform would be more costlier as compared to the processor based platforms having similar capacity, whereas commercial FPGA based emulators would be the cheapest? 

Tobias Strauch, EDAptix
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Compile times
Tobias Strauch, EDAptix   1/9/2015 5:42:28 PM
Hi Lauro,

I don't know the current compile time numbers, but are you sure that a processor based system has only a little bit faster compile time than a custom FPGA based one ?

It would be great to know the actual comparison numbers for realistic execution speeds as well. What're your thoughts on this and how will these numbers change in the future ?

Cheers, Tobias

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How does Tabula's DesignInsight affect things?
Clive"Max"Maxfield   1/9/2015 5:08:54 PM
Hi Lauro -- did you see my column Tabula's DesignInsight Offers 100% Observability Into 3PLDs?

How do you think thsi technology might affect FPGA-based hardware emulators?

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