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Qualcomm to Leverage Monolithic 3D for Smartphones

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posao
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Re: Many thanks to Zvi and Francois
posao   5/20/2015 6:49:34 PM
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zasto sranje?

resistion
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Intel and Xilinx
resistion   4/27/2015 9:58:43 PM
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Intel and Xilinx have their own TSV-less approaches. Maybe they have potential as well?

Or_Bach
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Re: Many thanks to Zvi and Francois
Or_Bach   4/24/2015 12:56:28 PM
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Sranje - the top layer could be cut off a normal wafer but as a second stratum it is over oxide.

If you like to learn more than I sugget you watch the recent Webcast by CEA Leti and us:

<http://www.webcaster4.com/Player/Index?webcastId=7723&uid=1139100&g=7bd002fc-4aa4-4783-9fac-5f656388c224&sid=>

 

As for foundries we really don't know yet, but here are some info. we do know:

A. IBM (now GF) and ST Micro had been partners with CEA Leti on monolithic 3D.

B. SMIC in their joint press frelease in respect to the work with Qualcomm did add the following: ". Going forward, SMIC will also extend its technology offerings on 3DIC"

 

 

sranje
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Many thanks to Zvi and Francois
sranje   4/24/2015 10:23:39 AM
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Very helpful explanation - thank you both.

Does this also means that the uper wafer will be in SOI?

If it is a research project which Mr. Arabi describes in PPt presentations for several years--- then what will be introduced in 2016 and in what colume?  There must be foundries involved - correct?  Has anything been ever mentioned / published - beyond research laboratories?

Francoise.vonTrapp
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Re: Just kicking the tires?
Francoise.vonTrapp   4/23/2015 3:36:58 PM
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Rick, I'm with you. I spoke with Matt Nowak at the IMAPS DPC in March, and he basically confirmed what you said - that Monoilthic 3D is a research project at Qualcomm, its got promise but is years out. He said its more difficult to design than 3D ICs with TSVs, and it lacks design tools. They also have pushed development for 3D ICs without interposers, but they haven't reached a low enough cost to replace package on package PoP in products.  

This all may be moot if Qualcomm takes advices of Jana Partners to spin off the chip business from it's "highly profitable patent licensing business" according to Reuters. http://www.reuters.com/article/2015/04/22/us-qualcomm-results-idUSKBN0ND2F420150422  
 

Francoise.vonTrapp
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Re: in the 8 billion dollar smart phone market
Francoise.vonTrapp   4/23/2015 2:12:14 PM
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SRanje, 
In the case of Monolithic 3D, you are not stacking two completed wafers or die on top of each other, which would require TSVs in most cases (except for two wafers face-to-face, in which the Ziptronix DBI process can be used to form interconnects between the copper pads). 

Monolithic is a layer build up process, in which there is one base wafer, and interocnnect layers are built up using traditional lithography and very small vias. Zvi mentions Leti's CoolCube process as an example. You can find a detailed article on the topic here http://www.3dincites.com/2015/03/coolcube-a-true-3dvlsi-alternative-to-scaling/

I hope this helps to answer your question. 

Or_Bach
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Monolithic 3D vs. TSV
Or_Bach   4/21/2015 2:57:43 PM
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The key to monolithic 3D is to use upper layer with thickness of about 100nm rather than the 50 micron used for TSV type 3D.

Since 100nm layer could not be handeled by their own than the layer need to be 'cut' after being bonded. 

To do so Qualcomm is planning to use the 'smart cut' technology invented more than 20 year ego by CEA Leti and licensed to Soitech. This technology had been used for more than a decade to produce SOI wafers.

Please study the second figure in the above blog and especally step b to d. In step b you can see the ion implant into the donor wafer. In step c you can see the donor wafer flip and bonded onto the target wafer. In step d you can see the resulted thin layer after cut.

You could read farther about this and related technologies in our site: http://www.monolithic3d.com/technology--patents.html 

 

sranje
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Re: in the 8 billion dollar smart phone market
sranje   4/21/2015 12:50:37 PM
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Dear Zvi - you are tireless - thank you

A question:

What Qualcomm's Arabi is talking about is wafer-to-wafer bonding -- FtoF and FtoB -- correct?

And he states that this will be done without TSV ?!  What I don't understand is how one can get on the other side of a wafer without some kind of TSV...  Do you or some of the audience understand how they could do it?

Or_Bach
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Re: Just kicking the tires?
Or_Bach   4/20/2015 2:55:16 AM
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What we do know is what Qualcomm executive stated in a publice form:

"Qualcomm's motivation, according to Arabi, is market share in the 8 billion smartphones that he predicts will be produced from 2014 to 2018 "

That seem very much like a 'public promise of a product', yet not a specific one.

As for TSV it is now knowen and stated publicly more than once that Qualcomm "will not stack die connected by through-silicon-vias (TSVs), but will build them on a single layered die, according to Karim Arabi, vice president of engineering at Qualcomm speaking at the International Symposium on Physical Design (ISPD-2015, Mar. 29-April 1)."

 

rick merritt
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Just kicking the tires?
rick merritt   4/19/2015 8:56:17 PM
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I believe Qualcommm's official line is that its work on monolithic 3-D work has been just research  to date with no public promise of a product yet. Is that correct?

The company has been driving 3D chip stacks of all sorts including TSV for years. That's because it is a leading edge user and Moore's law is slowing and chip stacks are seen as a next big thing. But that doesn't mean the technology is ready for logic or that Qualcomm is officially doing it yet.

Many more shoes have yet to be run before we call this horse race.

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