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Moore’s on at 28nm

Scaling will keep on using 28/22 nm
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Or_Bach
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"Intel, eASIC Partner to Make Custom Solutions for the Cloud"
Or_Bach   5/14/2015 3:44:57 PM
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Hi Alex

Thanks

Yes, I am very pleased with this Intel - eASIC partnership

alex_m1
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Re: why the parallel 28 and 16 paths to lower power?
alex_m1   5/14/2015 10:04:39 AM
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@Or-Bach, great news of your/easic's cooperation with intel, well done!

resistion
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Re: why the parallel 28 and 16 paths to lower power?
resistion   5/8/2015 9:21:09 AM
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16 FF is lower power but also more expensive than 28 nm, with double patterning and fins. The 28 ULP took the voltage to nearly same levels as 16.

Or_Bach
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why the parallel 28 and 16 paths to lower power?
Or_Bach   5/7/2015 11:46:01 PM
Let me quote from very recent blog titled: "ITRS 2.0: Heterogeneous integration"


Quote: "The transistors 'power consumption in today's network account for less than 10 percent of total power, total latency and total cost. It is the interconnection of these transistors and other components in the IC, in the package, on the printed circuit board and at the system and global network level, where the future limitations in performance, power, latency and cost reside. Overcoming these limitations will require heterogeneous integration of different materials, different devices (logic, memory, sensors, RF, analog, etc.) and different technologies (electronics, photonics, plasmonics, MEMS and sensors)."

 

- hence - monolithic 3D.


resistion
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Re: The bifurcation
resistion   5/7/2015 11:38:20 PM
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Yeah why the parallel 28 and 16 paths to lower power?

Or_Bach
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Re: The bifurcation
Or_Bach   5/7/2015 7:06:59 PM
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Hi

1. I don't see any motivation for TSMC to inflate 28 nm and drive design out of their 16 nm to 28 nm. 

2. The fact that Samsung, TSMC and others invest heavily into 28 nm tells us that they do not consider 16/14 nm as making 28 nm obsolete. And Samsung state it very clearly: "The cost per transistor has increased in 14nm FinFETs and will continue to do so, Low said, so an alternative technology such as 28nm SOI is necessary." 

3. In short we are now facing new industry dynamic which could be called: "bifurcation". We believe this will soon change to 3D scaling, in which 3D NAND is the first product line to adapt this new form of scaling.

Gondalf
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Re: The bifurcation
Gondalf   5/7/2015 3:24:43 AM
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Yes but i am always very cautious about TSMC claims on performance because they never end in a great breakthrough in shipping devices. This claim on more clock speed means nothing without the contest, they are at the same voltage or at an higher voltage so at an higher power consumption under SOC stress, IMO they have only rised the max voltage available for the process staying in the specifications of reliability in the long term to avoid electromigration, in this manner the customer can pump a lot tiny and cool cores (A53 for example has a very low power consumption , a rise on voltage don't do disasters) having higher power consumption but more performance. These claims about lower leakage is only because they have lowered the available voltage or because the process is less leaky???, yes because in this situation we will have a better idle battery life without any advantages under light or medium or full load, at the end the result is useless because the idle battery life is right now well enough. And what about wire leakage that stays the same being the same the metallization, the wire leakage is a damnation in these days and likely it is not improved.

28nm is clearly at the end, they are only doing some tricks to give more flexibility to an outdated process. The 16FF+ process is the future, without it the industry is in a real trouble.

Or_Bach
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Re: The bifurcation
Or_Bach   5/6/2015 7:41:46 PM
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very boring ??

In my eyes it is very exciting !

After 50 years of consistant scaling daynamic we now see a radical new game shaping up. In your comments you suggest that TSMC by their investment in 28 nm are rendering " 16FF+ is just now obsolete and useless because an older node performs better (reading TSMC numbers)", this for me is very interesting and suggest that the semiconductor idustry is facing now inflection point !

Gondalf
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Re: The bifurcation
Gondalf   5/6/2015 5:31:44 PM
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Ummm as always Foundries are pretty "large" with their claims about enhancements of new revision of old processes. These are "in theory" results, you know a process can not archive a bump of 15% in clock speed without a shrink even less a reduction of 50% in leakage at the same speed (!!!!!!!), following this way to think in this moment 16FF+ is just now obsolete and useless because an older node performs better (reading TSMC numbers). Still TSMC is hardly at work to ship 16FF+ as fast as it can to allow faster clock speeds on A72 and A57, or lower power consumption.

In pratics all these numbers will end in a low single digit enhancement in 28nm shipping devices.

The marketing sometimes is boring, very boring 

 

Or_Bach
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Re: The bifurcation
Or_Bach   5/6/2015 1:11:19 PM
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TSMC in the TSMC Technology Symposium last month announced mutiple improvments to their 28 nm node such as: "new 28nm processes, 28HPC+ and 28ULP. 28HPC+ is for high performance, a speed gain of about 15% for the same leakage, or a reduction of 30-50% in leakage for the same speed. There are also new standard cell libraries for this process with 9 and 7 track libraries (compared to 12T/9T before). The 28ULP (for ultra-low power) process is for IoT applications with a lower operating voltage of 0.7V (versus 0.9V for 28HPC+)". 

TSMC new improvments and associated significant R&D for the 'old' 28 nm nodes is clear signal that TSMC expects 28 nm to be an important node for some time to come.

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