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Intel -- The Litmus Test

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chipmonk0
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Re: Decoding the Intel numbers
chipmonk0   6/23/2015 5:40:28 PM
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Does interconnect R going up due to shrink have to mean that C or length would stay the same !

bec0
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Re: Decoding the Intel numbers
bec0   6/23/2015 12:15:45 PM
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Thanks 3D Guy! Just another reason Intel does not compete in the foundry market. And, why the rest of the world cannot expect those claimed 'cost reductions'. The inflection point and the cost issue for our industry remains. Qualcomm has committed to the solution. Who will be next...?

OtisTD
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Re: Decoding the Intel numbers
OtisTD   6/23/2015 11:03:56 AM
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I've seen those charts from Intel in many places.  In their investor conference calls they are certainly always shown- and in conferences such as SPIE or IEDM/VLSI they seem to show up quite a bit in invited talks and keynotes.  And I agree those are specific to Intel, not the industry, while the IBS graphs seem to be specific to fabless semiconductor makers, which Intel isn't.  So, it's a pretty clear case of apples and oranges to start trying to conflate the two graphs.  However, I also see that most people are taking Intel's graphs as a marketing ploy to gain foundry customers- rather than just Intel shouting to their investors that their underlying financial argument hasn't changed, i.e. they are still on Moore's law and their margins won't be falling off a cliff anytime soon.  After all, if you are invested in Intel, what you care about is that ther server/microprocessor cash cow is still giving milk- and that they have a plan to get new business in the future in other markets.  Of course the latter is where Intel may be weak (foundry and mobile), but the primary concern is still the cash cow.  Taking Mr. Or-Bach's market argument in reverse- it's quite clear that Intel's margin has remained pretty robust through 22nm and now into 14nm.  If costs were going up so much for Intel, wouldn't it show in their gross margin?  You can only hide that kind of thing for so long, so we can just wait and see.


I'd be interested if anyone has a link to Intel presenting these graphs as a pure argument for getting foundry business- rather than in a setting where they are just repeating their value proposition for investors- which is mainly based on their biggest business.  It seems to me that if you are going to accuse them of misrepresenting this graph and using it as a ploy to get Foundry business then you should provide some evidence they are doing that.  I admit, a lot of foundry investors are probably looking at these graphs and asking questions about what is different between Intel and TSMC costwise, but I think that is in the primary products for each- they all buy their equipment from the same 5-10 companies after all.  I think every company engages in some marketing in order to keep investors happy- I know TSMC does it just as much as Intel- so I don't think its reasonable to just point at Intel.  Didn't TSMC announce 16nm production had started last year?   Where are the parts?  And right now TSMC and Samsung are arguing through the press about who will have 10nm parts out the door first.  All of that is just noise until the parts hit the shelves.

 

One point Mr. Or-Bach glosses over is the back end scaling.  He mentions something about Intel over-scaling the back end, which I guess is a way of acknowledging that Intel scaled at 22nm, and at 14nm- and presumably will again at 10nm.  The fact is on a node basis Intel used to be behind TSMC in scaling (e.g. Intel 32nm was not as dense as TSMC 32nm), though if you look at it using the year of release they were pretty much on par.  But from 22/20nm to 16/14nm that situation changed.  Intel scaled the metal layers and the foundries did little or no scaling and just added in FinFETs to match Intel's trigates from 22nm.  So, now on a node basis Intel is ahead of everyone in scaling the back end.  That is their argument for why they are able to stay on Moore's law in a nutshell.  They are saying everyone else stopped scaling and we not only kept it up, but we accelerated it- so our 14nm is not only the first 14nm to hit the shelves it is scaled below what anybody else is putting out.  Of course if you look at Mx x Poly pitch- they didn't really get beyond 0.5x area by that measure- and when you point it out they do some hand waving and say they found area savings from layout etc. that essentially resulted in better than 0.5x area.  But they did at least get the 0.5x by the published numbers, and the foundries didn't.  Again, all of that is specific to Intel's big products, not their foundry products, so it's still apples and oranges.  But scaling is the basis for Moore's law working- so if you stop scaling you would not expect to get the economic benefits anymore.  The foundries are claiming they will do a full node scaling at 10nm and suddenly the price drops again, albeit not as much as traditional scaling would get you in the past, but still it shows that at least part of the reason for the price plateau at 16/14nm is a lack of scaling (and 28 to 22nm was a half node scaling too- 32 nm was the full node).

 

Personally I don't think Intel can compete with TSMC/Samsung in the foundry space, but not because they don't have the technical skills- they do.  They don't have the right (customer/service) focus and culture, and their process decisions are driven by the cash cows rather than by the flexibility needed in foundry processes.  Meaning it is easier for them to scale because they are mainly serving a couple of high margin products driven by performance.  Foundries are serving a different market- and have followed Intel's technology for years.  Neither side is quite ready to break the mold just yet, mostly all this back and forth about who is in the lead at 10nm  is all marketing noise for their investors.  Intel's 10nm will be first or close to first out the door, and will be more scaled than the foundries (using quad patterning probably)- and more expensive as well, but on a higher margin product with a huge market, that works just fine.  And the foundries will still be looking at Intel teardowns for hints on how to get to the next node.  The brilliant part was convincing everyone that you could go from 20nm to 16/14nm just by adding fins.

3D Guy
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Decoding the Intel numbers
3D Guy   6/23/2015 8:26:42 AM
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I think the Intel numbers are pretty specific to their microprocessors, and cannot be generalized industry-wide.

Intel's microprocessors used to have huge gates with average W/L = 10 or more in previous years. This was needed since their clock frequencies were quite aggressive and they were pushing the limits on the technology. With every passing generation, however, their average W/L has dropped for a few reasons:

- Their clock frequency has not increased much

- They use more cores instead of using bigger cores, so their wire lengths are shorter and gate sizes needed to drive them are reduced

- The GPU functionality has gone up quite a bit, and those need much smaller size gates than CPUs

As average W/L has dropped, they can obviously get more transistors into the same area and their cost per transistor benefits from that. Note that this is Intel-processor-specific, and they really shouldn't be marketing their technology saying their cost per transistor drops with scaling on a general basis - this would not be valid for other products which use their technology. This type of marketing is either uninformed or unethical on the part of Mark Bohr.

With the advent of Finfets, you can get more drive current by making transistors taller, and Intel has pursued that as well - this gives smaller W/L too. However, this introduces quite a bit of process risk and that's why you're seeing all these delays from Intel. 

Intel may be playing games with depreciated equipment costs to show lower cost per transistor too. With multiple patterning litho, that's an option. 

Bottom line: The Intel numbers are a combination of fact and creative marketing which shows company-specific info as though they are broadly applicable to all products made with their foundry technology. 

ScottenJ
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Global Foundries Says Cost Reductions Continuing
ScottenJ   6/22/2015 9:58:15 PM
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At the ASMC Global Foundries said that cost reductions paused at 20nm but for them they will deliver lower cost per transistor at 14nm and continue to do so at 10nm and 7nm.

mendicant98
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Stock price as function of processing cost
mendicant98   6/22/2015 6:19:03 PM
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I'm not sure stock price is that strong a function of processing cost per 100M transistors. Dividends play a strong role, yet stock price seems to anti-correlate with dividend for these four stocks. Also, Intel's and Qualcomm's businesses are much more diverse than TSMC's, relative to emphasis on processing cost. Additionally, Qualcomm's business model may be changing: they may become altogether fabless. It would be helpful to see a breakout of foundry revenue vs. total.

mendicant98
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IBS chart
mendicant98   6/22/2015 5:59:07 PM
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The remark on the IBS chart - suggesting Intel's cost per 100M gates keeps going down in a log-linear fashion, only because Intel starts at a higher cost - can't be correct. The costs shown for the IBS chart, and for Intel, are both absolute, not relative. Which suggests Intel is doing/achieving something different.

Zeev00
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Re: ....
Zeev00   6/22/2015 5:50:17 PM
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Your point tracks what the blog wrote about the IJD reader -- that intel started from a higher cost point. Perhaps. But the 30-40% advantage you quote should have disappeared in a single generation.

And then you add the large & hi-density designs that may have given Intel another leg up. Again, perhaps. But it also makes Intel non-competitive in the foundry business, as indeed we've observed.

So what's left? That Intel foundry is cheaper for Intel? I don't think anyone doubted that. The question, though, is what should the non-Intel players -- the rest of the world, if you wish -- prepare themselves for. The answer seems to be "no more cost reductions."

realjjj
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....
realjjj   6/22/2015 5:24:02 PM
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You assume that Intel's costs were sinilar to the foundries at 28nm and above but they could have been 30-40% higher easily.

Intel is also staying on 4 cores and using bigger and bigger GPUs that should be higher transistor density so that would distort their numbers in a pretty big way.
It's also unclear if the IBS numbers are for the foundries or the clients? If those numbers include 50-60% margins for the foundry then the cost for the foundry is a lot lower.

In their latest post quarterly report call, TSMC was claiming 16FF iwill have a long life and they did announce a bunch of version for the process. Plus they expect midrange smartphone SoCs on it in a couple of years  So from an outsider's point of view they seem to have figured how to balance costs well enough. Maybe a solution is to skip a beat in long lasting processes. 28nm long lasting, 20nm short lived, 16nm again long and so on. The cost is about the CAPEX more than anything else isn't it?

Ofc monolithic 3D would be great no matter what.

 

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