IEEE is addressing the Internet of Things with its upcoming S3S Conference 2015. Here are some intriguing highlights.
The upcoming IEEE S3S Conference 2015, Sonoma, CA, on October 5th thru 8th, will focus on key technologies for the IoT era. Here are some of the highlights in the upcoming event.
It is now accepted that the needs for the emerging IoT market are different from those that drive the high volume PC and smartphone markets. The following CEA Leti slide illustrates this industry bifurcation where traditional mass products follow the — ever more expensive — scaling curve, while IoT devices, with their focus on cost, power, flexibility and accessibility, will seek place near its minimum.
The current high volume is focus on handful of foundries and SoC vendors driving a handful of designs at extremely high development cost each, processed at the most advanced nodes, with minimal processing options. In contrast, the emerging IoT market is looking for older nodes with lower development costs, broad range of process options, with many more players both at the foundry side and the design side.
For the IoT market the key enabling technologies are extreme low power, as enabled by SOI and sub-threshold design, integrating with multiple sensor technologies and communication technologies that ca be enabled by 3D integrations. All of these combined in forming the IEEE S3S unified conference.
This year conference includes many exciting papers and invited talks. It starts with three plenary talks:
- Gary Patton — CTO of Global Foundries: New Game Changing Product Applications Enabled by SOI
- Geoffrey Yeap — VP at Qualcomm.: The Past and Future of Extreme Low Power (xLP) SoC Transistor, embedded memory and backend technology
- Tsu-Jae King Liu — Chair of EE Division, Berkeley University: Sustaining the Silicon Revolution: From 3-D Transistors to 3-D Integration
Prof. Tsu-Jae King will present in her talk an extremely low-power nano-mechanical switch that could be fabricated within the metal stack. The slide below describes some of its characteristics.
Prof. Joachin Burghartz of the Institute for Microelectronics Stuttgart will deliver an invited talk on “Ultra‐thin Chips for Flexible Electronics and 3D ICs” that will present a process technology to fabricate flexible devices 6-20 micron thin. This process flow is currently in manufacturing in their Stuttgart fab, as described below:
Another interesting discussion will be presented by NASA scientist Dr. Jin-Woo Han who will describe “Vacuum as New Element of Transistor” As shown below
These transistors are made of “nothing” and could be constructed within the metal stack, forming monolithic 3D integration with silicon-based fabric underneath.
The conference includes many more interesting invited talks and papers covering the full spectrum of IoT enabling technologies. In addition, the conference offers short course on SOI application and monolithic 3D integration, and a fundamental class on low voltage logic.
Among the papers we will present “Modified ELTRAN - A Game Changer for Monolithic 3D” that shows a practical flow for exiting fab to process monolithic 3D devices using their exiting transistor process and equipment. This flow leverages the work done by Canon about 20 years back called ELTRAN, for Epitaxial Layer Transfer. By deploying the elements of this proven process, a multilayer device could be built first by processing a multilayer transistors fabric at the front end of line, and then process the metal stacks from both top and bottom sides. The following slide illustrates the resulting monolithic 3D structure.
New technologies are an important part of the future of semiconductor industry, and a conference like the S3S would be a golden opportunity to step away for a moment from the silicon valley, and learn about non-silicon and silicon options that promise to shape the future.
—Zvi Or-Bach is the founder of MonolithIC 3D Inc. and a popular blogger on EE Times.
More content by Zvi Or Bach:
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